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DM74LS367 PDF预览

DM74LS367

更新时间: 2024-11-29 23:00:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器
页数 文件大小 规格书
4页 51K
描述
Hex 3-STATE Buffer/Bus Driver

DM74LS367 数据手册

 浏览型号DM74LS367的Datasheet PDF文件第2页浏览型号DM74LS367的Datasheet PDF文件第3页浏览型号DM74LS367的Datasheet PDF文件第4页 
August 1986  
Revised March 2000  
DM74LS367A  
Hex 3-STATE Buffer/Bus Driver  
General Description  
This device contains six independent gates each of which  
performs a non-inverting buffer function. The outputs have  
the 3-STATE feature. When enabled, the outputs exhibit  
the low impedance characteristics of a standard LS output  
with additional drive capability to permit the driving of bus  
lines without external resistors. When disabled, both the  
output transistors are turned OFF presenting a high-imped-  
ance state to the bus line. Thus the output will act neither  
as a significant load nor as a driver. To minimize the possi-  
bility that two outputs will attempt to take a common bus to  
opposite logic levels, the disable time is shorter than the  
enable time of the outputs.  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS367AM  
DM74LS367AN  
M16A  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Y = A  
Inputs  
Output  
A
L
G
L
Y
L
H
X
L
H
H
Hi-Z  
H = HIGH Logic Level  
L = LOW Logic Level  
X = Either LOW or HIGH Logic Level  
Hi-Z = 3-STATE (Outputs are disabled)  
© 2000 Fairchild Semiconductor Corporation  
DS006429  
www.fairchildsemi.com  

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