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DG441AK PDF预览

DG441AK

更新时间: 2024-11-30 20:32:11
品牌 Logo 应用领域
威世 - VISHAY 输出元件
页数 文件大小 规格书
8页 84K
描述
SPST, 4 Func, CMOS, CDIP16,

DG441AK 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Transferred零件包装代码:DIP
针数:16Reach Compliance Code:unknown
风险等级:5.25模拟集成电路 - 其他类型:SPST
JESD-30 代码:R-XDIP-T16JESD-609代码:e0
标称负供电电压 (Vsup):-15 V正常位置:NC
功能数量:4端子数量:16
最大通态电阻 (Ron):200 Ω最高工作温度:125 °C
最低工作温度:-55 °C输出:SEPARATE OUTPUT
封装主体材料:CERAMIC封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:+-15 V
认证状态:Not Qualified子类别:Multiplexer or Switches
标称供电电压 (Vsup):15 V表面贴装:NO
最长接通时间:400 ns切换:BREAK-BEFORE-MAKE
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

DG441AK 数据手册

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DG441/442  
Vishay Siliconix  
Quad SPST CMOS Analog Switches  
FEATURES  
BENEFITS  
APPLICATIONS  
D Low On-Resistance: 50  
D Low Leakage: 80 pA  
D Less Signal Errors and Distortion  
D Audio Switching  
D Reduced Power Supply  
D Battery Powered Systems  
D Data Acquisition  
Requirements  
D Low Power Consumption: 0.2 mW  
D Faster Throughput  
D Improved Reliability  
D Reduced Pedestal Errors  
D Simplifies Retrofit  
D Fast Switching Action—tON: 150  
D Hi-Rel Systems  
ns  
D Sample-and-Hold Circuits  
D Communication Systems  
D Automatic Test Equipment  
D Medical Instruments  
D Low Charge Injection—Q: –1 pC  
D DG201A/DG202 Upgrades  
D TTL/CMOS-Compatible Logic  
D Single Supply Capability  
D Simple Interfacing  
DESCRIPTION  
The DG441/442 monolithic quad analog switches are  
designed to provide high speed, low error switching of analog  
and audio signals. The DG441 has a normally closed function.  
The DG442 has a normally open function. Combining low  
To achieve high voltage ratings and superior switching  
performance, the DG441/442 are built on Vishay Siliconix’s  
high-voltage silicon-gate process. An epitaxial layer prevents  
latchup.  
on-resistance (50 , typ.) with high speed (tON 150 ns, typ.),  
the DG441/442 are ideally suited for upgrading DG201A/202  
sockets. Charge injection has been minimized on the drain for  
use in sample-and-hold circuits.  
Each switch conducts equally well in both directions when on,  
and blocks input voltages to the supply levels when off.  
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION  
D
1
IN  
1
NC IN  
D
2
2
Key  
3
2
1
20  
19  
4
5
6
7
8
18  
17  
16  
IN  
D
IN  
D
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
S
S
2
1
1
1
2
1
V–  
NC  
V+  
2
LCC  
NC  
NC  
DG441  
S
S
2
Top View  
15  
14  
GND  
V–  
V+  
Dual-In-Line and SOIC  
DG441  
S
4
S
3
GND  
NC  
9
10  
IN  
11  
12  
13  
Top View  
D
NC IN  
D
3
S
4
S
3
4
4
3
D
4
D
3
TRUTH TABLE  
Logic  
DG441  
DG442  
IN  
4
IN  
3
0
1
ON  
OFF  
ON  
OFF  
Logic “0” v 0.8 V  
Logic “1” w 2.4 V  
Document Number: 70053  
S-20147—Rev. H, 11-Mar-02  
www.vishay.com  
1

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