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DG211D

更新时间: 2024-01-15 03:31:25
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12页 511K
描述
Quad SPST CMOS Analog Switches

DG211D 技术参数

生命周期:Contact ManufacturerReach Compliance Code:unknown
风险等级:5间隙大小:2 mm
安装特点:THROUGH HOLE MOUNT最大通态电流:0.0005 A
最高工作温度:80 °C最低工作温度:-20 °C
输出电路类型:Transistor子类别:Other Optoelectronics
表面贴装:NOBase Number Matches:1

DG211D 数据手册

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Quad SPST CMOS Analog Switches  
ELECTRICAL CHARACTERISTICS (DG20ꢁA)  
(5+ = +1ꢀ5, 5- = -1ꢀ5, GND = 0, T = full ꢀꢃeartꢄng temꢃerature range, unless otherwise noted.) (For more information on TYP  
A
values see Note 3.)  
DG20ꢁAA  
DG20ꢁAC, D, E  
PARAMETER  
SWITCH  
SYMBVL  
CVNDITIVNS  
UNITS  
MIN  
TYP MAX MIN  
TYP MAX  
Analog Signal Range  
5
-1ꢀ  
1ꢀ  
-1ꢀ  
1ꢀ  
5
ANALOG  
Drain-Source ON Resistance  
(Note ꢀ)  
R
5
5
5
5
= ±105, 5 = 0.ꢁ5, I = 1mA  
2ꢀ0  
100  
2ꢀ0  
100  
DS (ON)  
S (OFF)  
D (OFF)  
D
IN  
S
5 = 1±5, 5 = -1±5  
S
D
Source OFF Leakage Current  
Drain OFF Leakage Current  
I
= 2.±5  
= 2.±5  
= 0.ꢁ5  
IN  
IN  
IN  
5 = -1±5, 5 = 1±5  
-100  
-100  
-200  
-1.0  
-100  
-100  
-200  
-1.0  
S
D
5 = 1±5, 5 = -1±5  
100  
200  
100  
200  
S
D
I
nA  
µA  
5 = -1±5, 5 = 1±5  
S
D
Drain ON Leakage  
Current (Note 6)  
5 = -1±5  
S
I
D (ON)  
5
= 1±5  
D
INPUT  
5
5
= 2.±5  
= 1ꢀ5  
IN  
IN  
Input Current with Input  
5oltage High  
I
INH  
1.0  
1.0  
Input Current with Input  
5oltage Low  
I
5
= 0  
-1.0  
-1.0  
INL  
IN  
Nꢀte .: Electrical characteristics, such as ON-Resistance, will change when power supplies other than ±1ꢀ5, are used.  
Nꢀte 6: I  
is leakage from driver into “ON” switch.  
D (ON)  
Pin Description  
PIN  
NAME  
QFN  
FUNCTIVN  
DIP/SV/TSSVP  
1, 16, 9, ꢁ  
1ꢀ, 1±, 7, 6  
IN1–IN±  
D1–D±  
S1–S±  
5-  
Input  
2, 1ꢀ, 10, 7  
16, 13, ꢁ, ꢀ  
Analog Switch Drain Terminal  
Analog Switch Source Terminal  
Negative-Supply 5oltage Input  
Ground  
3, 1±, 11, 6  
1, 12, 9, ±  
±
2
3
GND  
N.C.  
12  
13  
10  
11  
No Connection  
5+  
Positive-Supply 5oltage Input—Connected to Substrate  
Switching Time Test Circuit  
Switch output waveform shown for 5 = constant with  
S
logic input waveform as shown. Note that 5 may be  
S
+ve or -ve as per switching times test circuit. 5 is the  
O
steady state output with switch on. Feedthrough via  
gate capacitance may result in spikes at leading and  
trailing edge of output waveform.  
_______________________________________________________________________________________  
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