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DEI1160A PDF预览

DEI1160A

更新时间: 2022-06-24 15:42:12
品牌 Logo 应用领域
DEIAZ 输入元件
页数 文件大小 规格书
13页 570K
描述
PROGRAMMABLE GND/OPN & 28V/OPN DISCRETE INPUT INTERFACE IC

DEI1160A 数据手册

 浏览型号DEI1160A的Datasheet PDF文件第2页浏览型号DEI1160A的Datasheet PDF文件第3页浏览型号DEI1160A的Datasheet PDF文件第4页浏览型号DEI1160A的Datasheet PDF文件第6页浏览型号DEI1160A的Datasheet PDF文件第7页浏览型号DEI1160A的Datasheet PDF文件第8页 
Serial Interface  
The DEI1160A incorporates a serial IO interface for programming the Discrete Input configuration and for reading the  
Discrete Input status. Refer to Figure 2. The interface is SPI compatible and consists of /CS, SEL, SCLK, SDO, and SDI  
signals. Waveform Figures 4 – 7 depict the Data Read sequence and Configuration Write sequence for both 8-Bit cycles and  
also 16 bit “daisy chain” applications.  
Power Up Initialization  
The DEI1160A incorporates an on-chip power-up reset circuit and power sequencing provisions to force the DIN inputs to the  
28V/Open (internal pull down) state upon power. The reset circuit monitors the VCC logic supply and forces the  
Configuration Register to the Logic 0 (28V/Open) while VCC is stabilizing. The AFE circuit is designed to present the  
28V/Open (internal pull down) condition when VDD supply is present and VCC is below operational voltage.  
Figure 4 Read Data Register  
Figure 5 Read Data Register, 16 Bit Daisy Chain  
©2014 Device Engineering Inc.  
5 of 13  
DS-MW-01160-02 Rev A  
03/21/2014  

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