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DAC7728SPAGR PDF预览

DAC7728SPAGR

更新时间： 2024-11-28 06:52:15
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
54页 1471K
描述
Octal, 12-Bit, Low-Power, High-Voltage Output, Parallel Input DIGITAL-TO-ANALOG CONVERTER

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中文翻译

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DAC7728SPAGR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFP
包装说明：TFQFP, TQFP64,.47SQ针数：64
Reach Compliance Code：compliant风险等级：5.38
最大模拟输出电压：15 V最小模拟输出电压：-15 V
转换器类型：D/A CONVERTER输入位码：BINARY, 2'S COMPLEMENT BINARY
输入格式：PARALLEL, WORDJESD-30 代码：S-PQFP-G64
JESD-609代码：e4长度：10 mm
最大线性误差 (EL)：0.0244%湿度敏感等级：4
标称负供电电压：-16.5 V位数：12
功能数量：1端子数量：64
最高工作温度：105 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TFQFP
封装等效代码：TQFP64,.47SQ封装形状：SQUARE
封装形式：FLATPACK, THIN PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
电源：+-4.5/+-18/9/36,3/5 V认证状态：Not Qualified
采样速率：0.066 MHz座面最大高度：1.2 mm
标称安定时间 (tstl)：15 µs子类别：Other Converters
最大压摆率：7 mA标称供电电压：16.5 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：10 mm
Base Number Matches：1

DAC7728SPAGR 数据手册

 浏览型号DAC7728SPAGR的Datasheet PDF文件第2页浏览型号DAC7728SPAGR的Datasheet PDF文件第3页浏览型号DAC7728SPAGR的Datasheet PDF文件第4页浏览型号DAC7728SPAGR的Datasheet PDF文件第5页浏览型号DAC7728SPAGR的Datasheet PDF文件第6页浏览型号DAC7728SPAGR的Datasheet PDF文件第7页 
DAC7728  
www.ti.com  
SBAS461A –JUNE 2009–REVISED NOVEMBER 2009  
Octal, 12-Bit, Low-Power, High-Voltage Output, Parallel Input  
DIGITAL-TO-ANALOG CONVERTER  
Check for Samples: DAC7728  
1
FEATURES  
DESCRIPTION  
2
•
•
•
•
•
•
•
•
•
•
•
•
•
Bipolar Output: ±3V, up to ±16.5V  
The DAC7728 is  
digital-to-analog converter (DAC). With  
a
low-power, octal, 12-bit  
5V  
a
Unipolar Output: 0V to +33V  
12-Bit Resolution  
reference, the output can either be a bipolar ±15V  
voltage when operating from a dual ±15.5V (or  
higher) power supply, or a unipolar 0V to +30V  
voltage when operating from a +30.5V power supply.  
With a 5.5V reference, the output can either be  
±16.5V for a dual ±17V (or higher) power supply, or a  
unipolar 0V to +33V voltage when operating from a  
+33.5V (or higher) power supply. This DAC provides  
low-power operation, good linearity, and low glitch  
over the specified temperature range of –40°C to  
+105°C. This device is trimmed in manufacturing and  
has very low zero and full-scale error. In addition,  
user calibration can be performed over the entire  
signal chain. The output range can be offset by using  
the DAC Offset Register.  
Low Power: 13.5mW/Ch  
Relative Accuracy: 1LSB Max  
Flexible User Calibration  
Low Zero/Gain Error: ±1 LSB Max  
Low Glitch: 4nV-s  
Settling Time: 15μs  
Channel Monitor Output  
Programmable Gain: x4, x6  
Programmable Offset  
12-Bit Parallel Interface:  
50MHz (Write Operation)  
The DAC7728 features a standard, high-speed, 12-bit  
parallel interface that operates at up to 50MHz and is  
1.8V, 3V, and 5V logic compatible, to communicate  
with a DSP or microprocessor. The eight DACs and  
the auxiliary registers are addressed with five address  
lines. The device features double-buffered interface  
logic. An asynchronous load input (LDAC) transfers  
data from the DAC data register to the DAC latch.  
The asynchronous CLR input sets the output of all  
eight DACs to AGND. The VMON pin is a monitor  
output that connects to the individual analog outputs,  
the offset DAC, and the reference buffer outputs  
through a multiplexer (mux).  
•
Packages: QFN-56 (8mm x 8mm),  
TQFP-64 (10mm x 10mm)  
APPLICATIONS  
•
•
•
Automatic Test Equipment  
PLC and Industrial Process Control  
Communications  
IOVDD  
DGND  
DVDD  
AVDD  
AVSS  
REF-A  
Analog Monitor  
DAC7728  
VOUT-0  
VOUT-7  
VMON  
Reference  
Buffer A  
OFFSET  
DAC A  
A0  
Ref Buffer A  
Command  
Registers  
Ref Buffer B  
OFFSET-B  
The DAC7728 is pin-to-pin compatible with the  
DAC8728 (16-bit) and the DAC8228 (14-bit).  
A4  
R/W  
CS  
To DAC-0, DAC-1,  
DAC-2, DAC-3  
(When Correction Engine Disabled)  
OFFSET-A  
VOUT-0  
D0  
DAC-0  
Input Data  
Register 0  
Correction  
Engine  
DAC-0  
Data  
Latch-0  
D11  
To DAC-0, DAC-1,  
DAC-2, DAC-3  
LDAC  
User Calibration:  
Zero Register 0  
Gain Regsiter 0  
Internal Trimming  
Zero/Gain; INL  
RST  
AGND-A  
RSTSEL  
LDAC  
To DAC-4, DAC-5, DAC-6, DAC-7  
CLR  
USB/BTC  
BUSY  
OFFSET-B  
VOUT-7  
(Same Function Blocks  
for All Channels)  
Reference  
Buffer B  
OFFSET  
DAC B  
GPIO  
Power-Up/  
Power-Down  
Control  
AGND-B  
REF-B  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009, Texas Instruments Incorporated  
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中文翻译

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DAC7728SPAGR 替代型号

型号 品牌 替代类型 描述 数据表
DAC7728SPAG TI

完全替代

 Octal, 12-Bit, Low-Power, High-Voltage Output, Parallel Input DIGITAL-TO-ANALOG CONVERTER
DAC8228SPAG TI

类似代替

 八路、低功耗、14 位、+/-16.5V 输出并行输入数模转换器 | PAG | 64 |
DAC8728SPAG TI

类似代替

 Octal, 16-Bit, Low-Power, High-Voltage Output, Parallel Input DIGITAL-TO-ANALOG CONVERTER

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