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DAC707BH/QM PDF预览

DAC707BH/QM

更新时间： 2024-01-18 13:19:14
品牌 Logo 应用领域
BB 转换器微处理器
页数 文件大小 规格书
11页 152K
描述
D/A Converter, 1 Func, Parallel, Word Input Loading, 4us Settling Time, CDIP28,

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DAC707BH/QM 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DIP, DIP28,.6Reach Compliance Code：unknown
风险等级：5.77最大模拟输出电压：10 V
最小模拟输出电压：-10 V转换器类型：D/A CONVERTER
输入位码：2'S COMPLEMENT BINARY输入格式：PARALLEL, WORD
JESD-30 代码：R-CDIP-T28JESD-609代码：e0
最大线性误差 (EL)：0.003%标称负供电电压：-15 V
位数：16功能数量：1
端子数量：28最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：DIP封装等效代码：DIP28,.6
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5,+-15 V
认证状态：Not Qualified最大稳定时间：8 µs
标称安定时间 (tstl)：4 µs子类别：Other Converters
最大压摆率：70 mA标称供电电压：15 V
表面贴装：NO技术：BIPOLAR
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
Base Number Matches：1

DAC707BH/QM 数据手册

 浏览型号DAC707BH/QM的Datasheet PDF文件第2页浏览型号DAC707BH/QM的Datasheet PDF文件第3页浏览型号DAC707BH/QM的Datasheet PDF文件第4页浏览型号DAC707BH/QM的Datasheet PDF文件第6页浏览型号DAC707BH/QM的Datasheet PDF文件第7页浏览型号DAC707BH/QM的Datasheet PDF文件第8页 
DESCRIPTION OF PIN FUNCTIONS  
DAC707  
Pin  
#
DAC708/709  
DESCRIPTION  
DESIGNATOR  
VOUT  
DESCRIPTION  
Voltage output for DAC707 (±10V)  
Logic supply (+5V)  
DESIGNATOR  
1
A2  
A0  
Latch enable for D/A latch (Active low)  
VDD  
2
Latch enable for “low byte” input (Active low). When  
both A0 and A1 are logic “0”, the serial input mode is  
selected and the serial input is enabled.  
DCOM  
Digital common  
Analog common  
3
A1  
Latch enable for “high byte” input (Active low). When  
both A0 and A1 are logic “0”, the serial input mode is  
selected and the serial input is enabled.  
ACOM  
SJ  
4
5
D7 (D15)  
D6 (D14)  
Input for data bit 7 if enabling low byte (LB) latch or  
data bit 15 if enabling the high byte (HB) latch.  
Summing junction of the internal output op amp for the  
DAC707. Offset adjust circuit is connected to the  
summing junction of the output amplifier. Refer to Block  
Diagram.  
Input for data bit 6 if enabling LB latch or data bit 14 if  
enabling the HB latch.  
GA  
Gain adjust pin. Refer to Connection Diagram for gain  
adjust circuit.  
6
D5 (D13)  
Data bit 5 (LB) or data bit 13 (HB)  
+VCC  
–VCC  
CLR  
Positive supply voltage (+15V)  
Negative supply voltage (–15V)  
7
8
9
D4 (D12)  
D3 (D11)  
D2 (D10)  
Data bit 4 (LB) or data bit 12 (HB)  
Data bit 3 (LB) or data bit 11 (HB)  
Data bit 2 (LB) or data bit 10 (HB)  
Clear line. Sets the input latch to zero and sets the D/A  
latch to the input code that gives bipolar zero on the  
D/A output (Active low)  
WR  
A1  
Write control line (Active low)  
10 D1 (D9)  
Data bit 1 (LB) or data bit 9 (HB)  
Enable for D/A converter latch (Active low)  
11 D0 (D8)/SI  
Data bit 0 (LB) or data bit 8 (HB). Serial input when  
serial mode is selected.  
A0  
Enable for input latch (Active low)  
Data bit 15 (Most Significant Bit)  
12 DCOM  
13 RF2  
Digital common  
D15 (MSB)  
Feedback resistor for internal or external operational  
amplifier. Connect to pin 14 when a 10V output range  
is desired. Leave open for a 20V output range.  
D14  
Data bit 14  
14 VOUT  
Voltage output for DAC709 or feedback resistor for  
use with an external output op amp for the DAC708.  
Refer to Connection Diagram for connection of  
external op amp to DAC708.  
RF1 (DAC708)  
D13  
D12  
Data bit 13  
Data bit 12  
15 ACOM  
Analog common  
16 SJ (DAC709)  
Summing junction of the internal output op amp for the  
DAC709, or the current output for the DAC708. Refer  
to Connection Diagram for connection of external op  
amp to DAC708.  
I
OUT (DAC708)  
D11  
Data bit 11  
17 BPO  
Bipolar offset. Connect to pin 16 when operating in the  
bipolar mode. Leave open for unipolar mode.  
D10  
D9  
Data bit 10  
Data bit 9  
Data bit 8  
Data bit 7  
18 GA  
Gain adjust pin  
19 +VCC  
20 –VCC  
21 CLR  
Positive supply voltage (+15V)  
Negative supply voltage (–15V)  
D8  
D7  
Clear line. Sets the high and low byte input registers  
to zero and, for bipolar operation, sets the D/A register  
to the input code that gives bipolar zero on the D/A  
output. (In the unipolar mode, invert the MSB prior to  
the D/A.)  
D6  
Data bit 6  
22 WR  
Write control line  
D5  
Data bit 5  
23 CS  
Chip select control line  
Logic supply (+5V)  
D4  
Data bit 4  
24 VDD  
D3  
Data bit 3  
25 No pin  
26 No pin  
27 No pin  
28 No pin  
D2  
Data bit 2  
(The DAC708 and DAC709 are in 24-pin packages)  
D1  
Data bit 1  
D0 (LSB)  
Data bit 0 (Least Significant Bit)  
®
5
DAC707/708/709  
12345678...11

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