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DAC703BL PDF预览

DAC703BL

更新时间: 2024-02-26 03:36:19
品牌 Logo 应用领域
BB 转换器
页数 文件大小 规格书
12页 302K
描述
D/A Converter, 16-Bit, 1 Func, Hybrid, CQCC28,

DAC703BL 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.62
转换器类型:D/A CONVERTER输入位码:COMPLEMENTARY OFFSET BINARY
JESD-30 代码:S-XQCC-N28JESD-609代码:e0
最大线性误差 (EL):0.006%位数:16
功能数量:1端子数量:28
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC封装代码:QCCN
封装等效代码:LCC28,.45SQ封装形状:SQUARE
封装形式:CHIP CARRIER电源:5,+-15 V
认证状态:Not Qualified最大稳定时间:8 µs
子类别:Other Converters最大压摆率:68 mA
表面贴装:YES技术:HYBRID
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUADBase Number Matches:1

DAC703BL 数据手册

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Zero Drift  
DISCUSSION OF  
SPECIFICATIONS  
Zero drift is a measure of the change in the output with  
FFFFH (DAC701) applied to the digital inputs over the  
specified temperature range. For the bipolar models, zero is  
measured at 7FFFH (bipolar zero) applied to the digital  
inputs. This code corresponds to zero volts (DAC703) or  
zero milliamps (DAC702) at the analog output. The maxi-  
mum change in offset at tMIN or tMAX is referenced to the  
zero error at +25°C and is divided by the temperature  
change. This drift is expressed in parts per million of full  
scale range per degree centigrade (ppm of FSR/°C).  
DIGITAL INPUT CODES  
The DAC701/702/703 accept complementary digital  
input codes in either binary format (CSB, unipolar or  
COB, bipolar). The COB models DAC702/703 may be  
connected by the user for either complementary offset  
binary (COB) or complementary two’s complement (CTC)  
codes (see Table I).  
ANALOG OUTPUT  
SETTLING TIME  
DAC701  
Complementary  
Straight Binary  
(CSB)  
DAC702/703  
Complementary  
Offset Binary  
(COB)  
DAC702/703  
Complementary  
Two’s Complement  
(CTC)*  
Settling time of the D/A is the total time required for the  
analog output to settle within an error band around its final  
value after a change in digital input. Refer to Figure 1 for  
typical values for this family of products.  
DIGITAL  
INPUT  
CODES  
0000H  
7FFFH  
8000H  
+ Full Scale  
+1/2 Full Scale  
+1/2 Full Scale  
–1LSB  
+ Full Scale  
Bipolar Zero  
–1LSB  
–1LSB  
– Full Scale  
+ Full Scale  
Voltage Output  
Settling times are specified to ±0.003% of FSR (±1/2LSB  
for 14 bits) for two input conditions: a full-scale range  
change of 20V (DAC703) or 10V (DAC701) and a 1LSB  
change at the “major carry,” the point at which the worst-  
case settling time occurs. (This is the worst-case point since  
all of the input bits change when going from one code to the  
next).  
FFFFH  
Zero  
– Full Scale  
Bipolar Zero  
* Invert the MSB of the COB code with an external inverter to obtain CTC  
code.  
TABLE I. Digital Input Codes.  
ACCURACY  
Current Output  
Linearity  
Settling times are specified to ±0.003% of FSR for a full-  
scale range change for two output load conditions: one for  
10to 100and one for 1000. It is specified this way  
because the output RC time constant becomes the dominant  
factor in determining settling time for large resistive loads.  
This specification describes one of the most important mea-  
sures of performance of a D/A converter. Linearity error is  
the deviation of the analog output from a straight line drawn  
through the end points (all bits ON point and all bits OFF  
point).  
Differential Linearity Error  
1
Differential linearity error (DLE) of a D/A converter is the  
deviation from an ideal 1LSB change in the output from one  
adjacent output state to the next. A differential linearity error  
specification of ±1/2LSB means that the output step sizes  
can be between 1/2LSB and 3/2LSB when the input changes  
from one adjacent input state to the next. A negative DLE  
specification of no more than –1LSB (–0.006% for 14-bit  
resolution) insures monotonicity.  
DAC702  
DAC701  
DAC703  
0.1  
0.01  
RL = 100Ω  
RL = 1kΩ  
Monotonicity  
Monotonicity assures that the analog output will increase or  
remain the same for increasing input digital codes. The  
DAC701/702/703 are specified to be monotonic to 14 bits  
over the entire specification temperature range.  
0.001  
0.01  
0.1  
Settling Time (µs)  
1
10  
FIGURE 1. Final-Value Error Band vs Full-Scale Range  
Settling Time.  
DRIFT  
Gain Drift  
Gain drift is a measure of the change in the full-scale range  
output over temperature expressed in parts per million per  
degree centigrade (ppm/°C). Gain drift is established by: (1)  
testing the end point differences for each D/A at tMIN, +25°C  
and tMAX; (2) calculating the gain error with respect to the  
+25°C value; and (3) dividing by the temperature change.  
COMPLIANCE VOLTAGE  
Compliance voltage applies only to current output models. It  
is the maximum voltage swing allowed on the output current  
pin while still being able to maintain specified accuracy.  
®
6
DAC701, 702, 703  

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