Absolute Maximum Ratings
Operating Conditions
Lead Temperature (Soldering, 10 sec.)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
(Notes 1 and 2)
300 C
§
MAX
s
s
T
Temperature Range
T
T
A
MIN
A
DAC1208LCJ, DAC1209LCJ,
DAC1210LCJ, DAC1230LCJ,
DAC1231LCJ, DAC1232LCJ,
Supply Voltage (V
)
CC
17 V
DC
s
s
b
a
DAC1231LIN, DAC1232LIN
DAC1208LCJ-1, DAC1210LCJ-1,
DAC1230LCJ-1, DAC1231LCJ-1,
DAC1232LCJ-1, DAC1231LCN,
DAC1232LCN, DAC1231LCWM,
DAC1232LCWM
40 C
§
T
85 C
§
Voltage at Any Digital Input
Voltage at V Input
V
to GND
CC
g
25V
REF
Storage Temperature Range
b
a
65 C to 150 C
§
§
500 mW
e
Package Dissipation at T
(Note 3)
25 C
§
A
s
s
a
0 C
T
70 C
§
4.75 V to 16 V
§
DC DC
A
DC Voltage Applied to I
(Note 4)
or I
Range of V
CC
OUT1
OUT2
b
100 mV to V
CC
Voltage at Any Digital Input
V
CC
to GND
ESD Susceptability
800V
Electrical Characteristics
DC
e
Note 13); all other limits T
e
11.4 V
V
10.000 V , V
DC CC
to 15.75 V unless otherwise noted. Boldface limits apply from T
DC MIN
to T (see
MAX
REF
e
e
T
J
25 C.
§
A
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
Typ
(Note 10)
Parameter
Conditions
Notes
Units
Bits
Resolution
12
12
12
Linearity Error
(End Point Linearity)
Zero and Full-Scale
Adjusted
4, 7, 13
g
g
g
g
g
g
DAC1208, DAC1230
DAC1209, DAC1231
DAC1210, DAC1232
0.018
0.024
0.050
0.018
0.024
0.05
% of FSR
% of FSR
% of FSR
Differential Non-Linearity
Zero and Full-Scale
Adjusted
4, 7, 13
g
g
g
g
g
g
DAC1208, DAC1230
DAC1209, DAC1231
DAC1210, DAC1232
0.018
0.024
0.050
0.018
0.024
0.05
% of FSR
% of FSR
% of FSR
Monotonicity
4
7
7
7
12
12
12
Bits
b
b
g
Gain Error (Min)
Using Internal R
Fb
0.1
0.1
1.3
0.0
% of FSR
% of FSR
e
g
g
10V, 1V
V
ref
b
Gain Error (Max)
Gain Error Tempco
Power Supply Rejection
0.2
g
6.0
ppm of FS/ C
§
All Digital Inputs
Latched High
g
g
7
3.0
30
ppm of FSR/V
Reference Input Resistance (Min)
Reference Input Resistance (Max)
15
15
10
20
10
20
13
kX
e
e
20 Vp-p, f 100 kHz
All Data Inputs Latched
Output Feedthrough Error
V
REF
9
3.0
mVp-p
Low
Output Capacitance
All Data Inputs
Latched High
All Data Inputs
Latched Low
I
I
I
I
200
70
70
200
pF
pF
pF
pF
OUT1
OUT2
OUT1
OUT2
Supply Current Drain
13
2.0
2.5
mA
Output Leakage Current
I
All Data Inputs Latched
Low
All Data Inputs Latched
High
11, 13
11, 13
0.1
0.1
15
15
15
15
nA
nA
OUT1
I
OUT2
Digital Input Threshold
Digital Input Currents
Low Threshold
High Threshold
13
13
0.8
2.2
0.8
2.2
V
V
DC
DC
k
b
200
10
b
200
10
Digital Inputs 0.8V
13
13
mA
mA
DC
DC
l
Digital Inputs 2.2V
2