Datasheet > DAC1243X_SR

DAC1243X_SR

更新时间： 2022-01-19 05:40:00

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DAC1243X_SR 10BIT 30MSPS Single Channel DAC DAC1243X_SR\|Data Sheet

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DAC1243X_SR 数据手册

10BIT 30MSPS Single-Channel DAC

DAC1243X_SR

FEATURES

GENERAL DESCRIPTION

This core is

30MSPS D/A converter for general & video

applications. The dac1243x_sr core is

a CMOS single-channel 10bit

• Maximum conversion rate is 40MSPS

• +2.5V CMOS monolithic construction

• ±0.75LSB differential linearity (typical)

• ±1.0LSB integral linearity (typical)

• External or internal voltage reference

(Including Band Gap Reference Block)

• single Channel DAC

implemented in the Samsung 0.25um 2.5V

CMOS process. Digital inputs are coded as

straight binary. This DAC includes independent

power down control and the ability to sense

output load. An external(optional) or internal

0.7V reference voltage(VBIAS) and a single

external resister control the full-scale output

current together. It uses the two architecture of

current-segment and binerary-weighted.

• 10-Bit parallel Straight Binary Digital

input

• DAC auto-load detection circuitry

• Temperature : 0 ~ 70°C

• Just analog switch Power_Down enable

FUNCTIONAL BLOCK DIAGRAM

Segmented

MSBs

D1[9:0]

Digital

Decode

PDAC

Segmented

MSBs

DTOUT

PRE

Auto-load

Detect

SEL

CCOMP

VBIAS

IREF

Bias_gen

ALLPD

TYPICAL APPLICATION

•High Definition Television(HDTV)

•High Resolution Color Graphics

Ver 1.0 (Jan. 2000)

•Hard Disk Driver(HDD)

•CAE/CAD/CAM

•Image Processing

•Instrumentation

This datasheet is

a preliminary version. No responsibility is

assumed by SEC for its use nor for any infringements of patents

or other rights of third parties that may result from its use. The

content of this datasheet is subject to change without any notice.

SAMSUNG ELECTRONICS Co. LTD

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