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CYW3335 PDF预览

CYW3335

更新时间: 2024-11-28 19:56:11
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管
页数 文件大小 规格书
10页 157K
描述
Prescaler/Multivibrator, 2-Func, PDSO20, 0.173 INCH, MO-153, TSSOP-20

CYW3335 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP,
针数:20Reach Compliance Code:unknown
风险等级:5.89其他特性:64/65 DIVISION RATIO ALSO AVAILABLE
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:6.5 mm湿度敏感等级:1
数据/时钟输入次数:1功能数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mm最小 fmax:2500 MHz
Base Number Matches:1

CYW3335 数据手册

 浏览型号CYW3335的Datasheet PDF文件第2页浏览型号CYW3335的Datasheet PDF文件第3页浏览型号CYW3335的Datasheet PDF文件第4页浏览型号CYW3335的Datasheet PDF文件第5页浏览型号CYW3335的Datasheet PDF文件第6页浏览型号CYW3335的Datasheet PDF文件第7页 
CYW3335  
Dual Serial Input PLL with 2.5-GHz Prescalers  
Features  
Applications  
• Operating voltage 2.7V to 5.5V  
• PLL1 and PLL2 operating frequency:  
— 2.5 GHz with prescaler ratios of 32/33 or 64/65  
• Lock detect feature  
The Cypress CYW3335 is a dual serial input PLL frequency  
synthesizer designed to combine the Transmit and Receive RF  
frequency sections of wireless communications systems. Two  
2.5-GHz prescalers, each with pulse swallow capability are in-  
cluded. The device operates from 2.7V and dissipates only  
38 mW.  
µA typical at 3.0V  
• Power-down mode I < 1  
CC  
• 20-pin TSSOP (Thin Shrink Small Outline Package)  
CYW3335 Dual Hi-Lo PLL Block Diagram  
GND (4)  
GND (7)  
V
CC1 (1)  
VCC2 (20)  
VP1 (2)  
FIN1 (5)  
Prescaler  
32/33 or  
64/65  
fp1  
Binary 7-Bit  
Swallow Counter  
Binary 11-Bit  
Programmable Counter  
DOPLL1 (3)  
Phase  
Detector  
Charge  
Pump  
FIN1# (6)  
19-Bit  
Latch  
Pwr-dwn  
PLL1  
OSC_IN (8)  
fr fp  
fr1  
fr2  
15-Bit  
Monitor  
Output  
Selector  
Reference Counter  
FO/LD (10)  
20-Bit Latch  
Latch  
Selector  
LE (13)  
DATA (12)  
20-Bit Latch  
Power  
Control  
15-Bit  
Reference Counter  
22-Bit  
Shift  
Reg.  
Cntrl  
CLOCK (11)  
19-Bit  
Latch  
Pwr-dwn  
PLL2  
Phase  
Detector  
Charge  
Pump  
F
IN2 (16)  
Prescaler  
32/33 or  
64/65  
Binary 7-Bit  
Swallow Counter  
Binary 11-Bit  
Programmable Counter  
DOPLL2 (18)  
fp2  
F
IN2# (15)  
GND (14)  
GND (9)  
GND (17)  
VP2 (19)  
Pin Configuration  
VCC  
1
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
VP2  
2
VP1  
DOPLL1  
GND  
3
DOPLL2  
GND  
4
FIN  
1
5
FIN2  
FIN1#  
GND  
6
FIN2#  
GND  
LE  
7
OSC_IN  
GND  
8
9
DATA  
CLOCK  
FO/LD  
10  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
February 14, 2000, rev. **  

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