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CYW312OXC

更新时间: 2024-02-21 22:12:33
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
20页 254K
描述
FTG for VIA⑩ K7 Series Chipset with Programmable Output Frequency

CYW312OXC 数据手册

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W312-02  
Serial Data Interface  
The W312-02 features a two-pin, serial data interface that can  
be used to configure internal register settings that control  
particular device functions.  
accessed in sequential order from lowest to highest byte with  
the ability to stop after any complete byte has been trans-  
ferred. For byte/word write and byte read operations, system  
controller can access individual indexed byte. The offset of the  
indexed byte is encoded in the command code.  
.The block write and block read protocol is outlined in Table 1  
while Table 2 outlines the corresponding byte write and byte  
read protocol. The slave receiver address is 11010010 (D2h)  
Data Protocol  
The clock driver serial protocol supports byte/word write,  
byte/word read, block write and block read operations from the  
controller. For block write/read operation, the bytes must be  
Table 1. Command Code Definitions  
Bit  
Descriptions  
7
0 = Block read or block write operation  
1 = Byte/Word read or byte/word write operation  
6:0  
Byte offset for byte/word read or write operation. For block read or write operations, these bits  
need to be set at ‘0000000’.  
Table 2. Block Read and Block Write Protocol  
Block Write Protocol  
Block Read Protocol  
Description  
Bit  
1
Description  
Bit  
1
Start  
Start  
2:8  
9
Slave address – 7 bits  
Write  
2:8  
9
Slave address – 7 bits  
Write  
10  
Acknowledge from slave  
10  
Acknowledge from slave  
11:18  
Command Code – 8 bits  
11:18  
Command Code – 8 bits  
‘00000000’ stands for block operation  
‘00000000’ stands for block operation  
19  
20:27  
28  
29:36  
37  
38:45  
46  
...  
Acknowledge from slave  
Byte Count – 8 bits  
Acknowledge from slave  
Data byte 0 – 8 bits  
Acknowledge from slave  
Data byte 1 – 8 bits  
Acknowledge from slave  
Data Byte N/Slave Acknowledge...  
Data Byte N – 8 bits  
Acknowledge from slave  
Stop  
19  
20  
21:27  
28  
29  
30:37  
38  
39:46  
47  
48:55  
56  
Acknowledge from slave  
Repeat start  
Slave address – 7 bits  
Read  
Acknowledge from slave  
Byte count from slave – 8 bits  
Acknowledge  
Data byte from slave – 8 bits  
Acknowledge  
...  
...  
...  
Data byte from slave – 8 bits  
Acknowledge  
...  
...  
...  
Data bytes from slave/Acknowledge  
Data byte N from slave – 8 bits  
Not Acknowledge  
...  
Stop  
Document #: 38-07259 Rev. *C  
Page 4 of 20  

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