Datasheet > CYW20719B1KUMLG

CYW20719B1KUMLG

更新时间： 2024-11-29 01:11:07

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
49页	1110K
描述
Enhanced Low Power, BR/EDR/BLE Bluetooth 5.0 SOC

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CYW20719B1KUMLG 数据手册

PRELIMINARY

CYW20719

Enhanced Low Power, BR/EDR/BLE

Bluetooth 5.0 SOC

The CYW20719 is a BT 5.0 compliant, stand-alone baseband processor with an integrated 2.4 GHz transceiver with BLE, EDR and

BR. The device is intended for use in audio, IoT, sensors (medical, home, security, and so forth) and human interface device (HID)

applications. Manufactured using an advanced 40nm CMOS low-power fabrication process, the CYW20719 employs high level of

integration to reduce external components, thereby minimizing application footprint and costs.

This datasheet provides details of the functional, operational, and electrical characteristics of the CYW20719 device. It is intended for

hardware, design, application, and OEM engineers.

Figure 1. Functional Block Diagram

MODEM

PKA

SHA

LCU

RX/TX

AES

96 MHz

ARM CM4

w/FPU

Patch RAM

64 KB

RAM

448 KB

ROM 2 MB

Flash 1 MB

Bluetooth 5.0

MAC

Security Engine

Patch Control

AHB Bus Matrix

Random

Number

Generator

PWM x6

ADC

Core Buck

HP- LPO

128 KHz

XTALOSC

32 KHz

Key Scan

Watchdog

Peripheral

UART

GPIO

x40

Digital

LDO

LP- LPO

32 KHz

XTALOSC

24 MHz

SPIFFY X2

(MIPI

DBI-C, SPI,

Quad SPI)

1x I2C M/S

1x I2C

master

HCI UART

HID OFF

Timer

RF LDO

Power Management

Unit

Clock Management

Hardware Peripheral Block

Cypress Semiconductor Corporation

Document Number: 002-14815 Rev. *D

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised Thursday, July 12, 2018

12 3 4 5 6 7...49

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