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CYUSB3065-BZXC PDF预览

CYUSB3065-BZXC

更新时间: 2024-11-19 11:11:31
品牌 Logo 应用领域
英飞凌 - INFINEON 时钟控制器外围集成电路
页数 文件大小 规格书
52页 421K
描述
EZ-USB™ CX3 MIPI CSI2至USB 5 Gbps相机控制器

CYUSB3065-BZXC 数据手册

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CYUSB306X  
EZ-USB™ CX3 MIPI CSI-2 to SuperSpeed USB  
bridge controller  
Features  
• Universal Serial Bus (USB) integration  
- USB 3.0 and USB 2.0 peripherals, compliant with USB 3.0 specification 1.0  
- 5-Gbps USB 3.0 PHY compliant with PIPE 3.0  
- Thirty-two physical endpoints  
• MIPI CSI-2 RX interface  
- MIPI CSI-2 compliant (Version 1.01, Revision 0.04 – 2nd April 2009)  
- Supports up to four data lanes (CYUSB3065 supports up to four lanes; CYUSB3064 supports up to two lanes)  
- Each lane supports up to 1 Gbps (CYUSB3065 supports up to four lanes; CYUSB3064 supports up to two lanes)  
- CCI interface for image sensor configuration  
• Supports the following video data formats:  
- User-defined 8-bit  
- RAW8/10/12/14  
- YUV422 (CCIR/ITU 8/10bit), YUV444  
- RGB888/666/565  
• Fully accessible 32-bit CPU  
- ARM926EJ-S core with 200-MHz operation  
- 512-KB or 256-KB embedded SRAM  
• Additional connectivity to the following peripherals:  
- I2C master controller at 1 MHz  
- I2S master (transmitter only) at sampling frequencies of 8 kHz, 16 kHz, 32 kHz, 44.1 kHz, 48 kHz, 96 kHz, and  
192 kHz  
- UART support of up to 4 Mbps  
- SPI master at 33 MHz  
• 12 GPIOs  
• Ultra-low-power in core power-down mode  
• Independent power domains for core and I/O  
- Core operation at 1.2 V  
- I2S, UART, and SPI operation at 1.8 to 3.3 V  
- I2C, I/O operation at 1.8 to 3.3 V  
• 10 × 10 mm, 0.8-mm pitch Pb-free ball grid array (BGA) package  
• EZ-USB™ software development kit (SDK) for easy code development  
Errata: For information on silicon errata, see “Errata” on page 46. Details include trigger conditions, devices  
affected, and proposed workaround.  
Datasheet  
www.infineon.com  
Please read the Important Notice and Warnings at the end of this document  
page 1  
001-87516 Rev. *P  
2023-04-27  

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