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CY9AF421KWQN-G-JNE2 PDF预览

CY9AF421KWQN-G-JNE2

更新时间: 2024-11-25 14:53:15
品牌 Logo 应用领域
英飞凌 - INFINEON 微控制器
页数 文件大小 规格书
90页 3279K
描述
FM3 CY9AFx2xK/L-Series Low Power Arm? Cortex?-M3 Microcontroller (MCU) Family

CY9AF421KWQN-G-JNE2 数据手册

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CY9A420L Series  
32-Bit ARM® Cortex®-M3  
FM3 Microcontroller  
The CY9A420L Series are highly integrated 32-bit microcontrollers dedicated for embedded controllers with low-power  
consumption mode and competitive cost.  
®
®
These series are based on the ARM Cortex -M3 Processor with on-chip Flash memory and SRAM, and have peripheral  
functions such as various timers, ADCs, DACs and Communication Interfaces (CAN, UART, CSIO, I2C, LIN).  
The products which are described in this data sheet are placed into TYPE11 product categories in FM3 Family Peripheral Manual.  
Features  
[UART]  
32-bit ARM® Cortex®-M3 Core  
Full duplex double buffer  
Processor version: r2p1  
Selection with or without parity supported  
Built-in dedicated baud rate generator  
External clock available as a serial clock  
Up to 40 MHz Frequency Operation  
Integrated Nested Vectored Interrupt Controller (NVIC): 1  
NMI (non-maskable interrupt) and  
48 peripheral interrupts and 16 priority levels  
Various error detection functions available (parity errors,  
framing errors, and overrun errors)  
24-bit System timer (Sys Tick): System timer for OS task  
management  
[CSIO]  
Full duplex double buffer  
On-chip Memories  
Built-in dedicated baud rate generator  
Overrun error detection function available  
[Flash memory]  
64 Kbytes  
[LIN]  
Read cycle: 0 wait-cycle  
Security function for code protection  
LIN protocol Rev.2.1 supported  
Full duplex double buffer  
Master/Slave mode supported  
[SRAM]  
This series contains 4 Kbyte on-chip SRAM memories that is  
connected to System bus of Cortex-M3 core.  
LIN break field generation (can be changed to 13-bit to 16-bit  
length)  
SRAM1: 4 Kbyte  
LIN break delimiter generation (can be changed to 1-bit to  
4-bit length)  
CAN Interface (Max one channel)  
Compatible with CAN Specification 2.0A/B  
Maximum transfer rate: 1 Mbps  
Built-in 32 message buffer  
Various error detection functions available (parity errors,  
framing errors, and overrun errors)  
[I2C]  
Standard-mode (Max 100 kbps) / Fast-mode (Max 400 kbps)  
supported  
Multi-function Serial Interface (Max four channels)  
4 channels without FIFO (ch.0, ch.1, ch.3, ch.5)  
Operation mode is selectable from the followings for each  
channel.  
UART  
CSIO  
LIN  
I2C  
Cypress Semiconductor Corporation  
Document Number: 002-05659 Rev. *C  
• 198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised May 7, 2019  

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