PSoC® 5LP: CY8C56LP Family
Datasheet
Table 14-1. Acronyms Used in this Document (continued)
14. Acronyms
Acronym
FIR
Description
finite impulse response, see also IIR
flash patch and breakpoint
full-speed
Table 14-1. Acronyms Used in this Document
Acronym
abus
Description
FPB
FS
analog local bus
ADC
AG
analog-to-digital converter
analog global
GPIO
general-purpose input/output, applies to a PSoC
pin
AHB
AMBA (advanced microcontroller bus archi-
tecture) high-performance bus, an ARM data
transfer bus
HVI
high-voltage interrupt, see also LVI, LVD
integrated circuit
IC
ALU
arithmetic logic unit
IDAC
current DAC, see also DAC, VDAC
integrated development environment
AMUXBUS analog multiplexer bus
IDE
API
application programming interface
I2C, or IIC
Inter-Integrated Circuit, a communications
protocol
APSR
ARM®
ATM
BW
application program status register
advanced RISC machine, a CPU architecture
automatic thump mode
IIR
infinite impulse response, see also FIR
internal low-speed oscillator, see also IMO
internal main oscillator, see also ILO
integral nonlinearity, see also DNL
input/output, see also GPIO, DIO, SIO, USBIO
initial power-on reset
ILO
IMO
INL
bandwidth
CAN
Controller Area Network, a communications
protocol
I/O
CMRR
CPU
common-mode rejection ratio
central processing unit
IPOR
IPSR
IRQ
ITM
LCD
LIN
interrupt program status register
interrupt request
CRC
cyclic redundancy check, an error-checking
protocol
instrumentation trace macrocell
liquid crystal display
DAC
DFB
DIO
digital-to-analog converter, see also IDAC, VDAC
digital filter block
Local Interconnect Network, a communications
protocol.
digital input/output, GPIO with only digital
capabilities, no analog. See GPIO.
LR
link register
DMA
DNL
direct memory access, see also TD
differential nonlinearity, see also INL
do not use
LUT
LVD
LVI
lookup table
low-voltage detect, see also LVI
low-voltage interrupt, see also HVI
low-voltage transistor-transistor logic
multiply-accumulate
DNU
DR
port write data registers
digital system interconnect
data watchpoint and trace
error correcting code
LVTTL
MAC
MCU
MISO
NC
DSI
DWT
ECC
ECO
EEPROM
microcontroller unit
master-in slave-out
external crystal oscillator
no connect
electrically erasable programmable read-only
memory
NMI
nonmaskable interrupt
non-return-to-zero
NRZ
NVIC
NVL
opamp
PAL
EMI
electromagnetic interference
external memory interface
end of conversion
nested vectored interrupt controller
nonvolatile latch, see also WOL
operational amplifier
EMIF
EOC
EOF
EPSR
ESD
ETM
end of frame
programmable array logic, see also PLD
program counter
execution program status register
electrostatic discharge
embedded trace macrocell
PC
PCB
PGA
printed circuit board
programmable gain amplifier
Document Number: 001-84935 Rev. *C
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