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CY8C3245LTI-144T PDF预览

CY8C3245LTI-144T

更新时间: 2024-11-21 01:02:47
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟
页数 文件大小 规格书
128页 11859K
描述
Programmable System-on-Chip (PSoC®)

CY8C3245LTI-144T 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:QFN-48Reach Compliance Code:compliant
ECCN代码:3A991.A.3HTS代码:8542.31.00.01
风险等级:5.56地址总线宽度:
边界扫描:YES总线兼容性:8051; I2C; I2S; IDE; LIN; PS/2; SIO; SMBUS; SPI; UART; USB
最大时钟频率:33 MHz外部数据总线宽度:
JESD-30 代码:S-XQCC-N48长度:7 mm
I/O 线路数量:25端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC48,.28SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.8/5 V认证状态:Not Qualified
RAM(字数):4000ROM大小(位):262144 Bits
座面最大高度:1 mm子类别:Other uPs/uCs/Peripheral ICs
最大供电电压:5.5 V最小供电电压:1.71 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
紫外线可擦:N宽度:7 mm
Base Number Matches:1

CY8C3245LTI-144T 数据手册

 浏览型号CY8C3245LTI-144T的Datasheet PDF文件第2页浏览型号CY8C3245LTI-144T的Datasheet PDF文件第3页浏览型号CY8C3245LTI-144T的Datasheet PDF文件第4页浏览型号CY8C3245LTI-144T的Datasheet PDF文件第5页浏览型号CY8C3245LTI-144T的Datasheet PDF文件第6页浏览型号CY8C3245LTI-144T的Datasheet PDF文件第7页 
PSoC® 3: CY8C32 Family Data Sheet  
Programmable System-on-Chip (PSoC®)  
General Description  
PSoC® 3 is a true programmable embedded system-on-chip, integrating configurable analog and digital peripherals, memory, and a  
microcontroller on a single chip. The PSoC 3 architecture boosts performance through:  
8051 core plus DMA controller at up to 50 MHz  
Ultra low power with industry's widest voltage range  
Programmable digital and analog peripherals enable custom functions  
Flexible routing of any analog or digital peripheral function to any pin  
PSoC devices employ a highly configurable system-on-chip architecture for embedded control design. They integrate configurable  
analog and digital circuits, controlled by an on-chip microcontroller. A single PSoC device can integrate as many as 100 digital and  
analog peripheral functions, reducing design time, board space, power consumption, and system cost while improving system quality.  
Features  
Operating characteristics  
Analog peripherals  
Voltage range: 1.71 to 5.5 V, up to six power domains  
Temperature range (ambient) –40 to 85 °C[1]  
DC to 50-MHz operation  
Power modes  
• Active mode 1.2 mA at 6 MHz, and 12 mA at 48 MHz  
• 1-µA sleep mode  
Configurable 8- to 12-bit delta-sigma ADC  
8-bit DAC  
Two comparators  
CapSense® support, up to 62 sensors  
1.024 V ±1% internal voltage reference  
Versatile I/O system  
29 to 72 I/O pins – up to 62 general-purpose I/Os (GPIOs)  
Up to eight performance I/O (SIO) pins  
• 200-nA hibernate mode with RAM retention  
Boost regulator from 0.5-V input up to 5-V output  
Performance  
• 25 mA current sink  
8-bit 8051 CPU, 32 interrupt inputs  
24-channel direct memory access (DMA) controller  
• Programmable input threshold and output high voltages  
• Can act as a general-purpose comparator  
• Hot swap capability and overvoltage tolerance  
Up to two USBIO pins that can be used as GPIOs  
Route any digital or analog peripheral to any GPIO  
LCD direct drive from any GPIO, up to 46 × 16 segments  
CapSense support from any GPIO  
Memories  
Up to 64 KB program flash, with cache and security features  
Up to 8 KB additional flash for error correcting code (ECC)  
Up to 8 KB RAM  
Up to 2 KB EEPROM  
1.2-V to 5.5-V interface voltages, up to four power domains  
Digital peripherals  
Programming and debug  
Four 16-bit timer, counter, and PWM (TCPWM) blocks  
JTAG (4-wire), serial wire debug (SWD) (2-wire), and single  
wire viewer (SWV) interfaces  
I2C, 1 Mbps bus speed  
Bootloader programming through I2C, SPI, UART, USB, and  
other interfaces  
USB 2.0 certified Full-Speed (FS) 12 Mbps peripheral  
interface (TID#40770053) using internal oscillator[2]  
16 to 24 universal digital blocks (UDB), programmable to  
create any number of functions:  
• 8-, 16-, 24-, and 32-bit timers, counters, and PWMs  
• I2C, UART, SPI, I2S, LIN 2.0 interfaces  
• Cyclic redundancy check (CRC)  
• Pseudo random sequence (PRS) generators  
• Quadrature decoders  
• Gate-level logic functions  
Package options: 48-pin SSOP, 48-pin QFN, 68-pin QFN,  
100-pin TQFP, and 72-pin WLCSP  
Development support with free PSoC Creator™ tool  
Schematic and firmware design support  
Over 100 PSoC Components™ integrate multiple ICs and  
system interfaces into one PSoC. Components are free  
embedded ICs represented by icons. Drag and drop  
component icons to design systems in PSoC Creator.  
Includes free Keil 8051 compiler  
Programmable clocking  
Supports device programming and debugging  
3- to 24-MHz internal oscillator, 2% accuracy at 3 MHz  
4- to 25-MHz external crystal oscillator  
Internal PLL clock generation up to 50 MHz  
Low-power internal oscillator at 1, 33, and 100 kHz  
32.768-kHz external watch crystal oscillator  
12 clock dividers routable to any peripheral or I/O  
Notes  
1. The maximum storage temperature is 150 °C in compliance with JEDEC Standard JESD22-A103, High Temperature Storage Life.  
2. This feature on select devices only. See Ordering Information on page 111 for details.  
Cypress Semiconductor Corporation  
Document Number: 001-56955 Rev. *Y  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised June 27, 2016  

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