Datasheet > CY8C27443-24SXI

CY8C27443-24SXI

更新时间： 2023-12-06 20:01:07

品牌	Logo	应用领域
英飞凌 - INFINEON		/
页数	文件大小	规格书
69页	1032K
描述
CY8C27x43

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中文翻译

获取价格

数据手册

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CY8C27443-24SXI 数据手册

CY8C27143/CY8C27243

CY8C27443/CY8C27543

CY8C27643

PSoC^®Programmable System-on-Chip™

■ Additional system resources

Features

❐ I²C slave, master, and multi-master to 400 kHz

❐ Watchdog and sleep timers

■ Powerful Harvard-architecture processor

❐ M8C processor speeds up to 24 MHz

❐ 8 × 8 multiply, 32-bit accumulate

❐ Low power at high speed

❐ User-configurable low-voltage detection (LVD)

❐ Integrated supervisory circuit

❐ On-chip precision voltage reference

❐ Operating voltage: 3.0 V to 5.25 V

❐ Operating voltages down to 1.0 V using on-chip switch mode

pump (SMP)

❐ Industrial temperature range: –40 C to +85 C

■ Advanced peripherals (PSoC^®blocks)

■ Complete development tools

❐ Free development software (PSoC Designer™)

❐ Full-featured, in-circuit emulator (ICE) and programmer

❐ Full-speed emulation

❐ Complex breakpoint structure

❐ Twelve rail-to-rail analog PSoC blocks provide:

• Up to 14-bit analog-to-digital converters (ADCs)

• Up to 9-bit digital-to-analog converters (DACs)

• Programmable gain amplifiers (PGAs)

❐ 128 KB trace memory

Logic Block Diagram

• Programmable filters and comparators

Analog

Port 5 Port 4 Port 3 Port 2 Port 1 Port 0

Drivers

❐ Eight digital PSoC blocks provide:

• 8- to 32-bit timers and counters, 8- and 16-bit pulse-width

modulators (PWMs)

PSoC

CORE

• Cyclical redundancy check (CRC) and pseudo random

sequence (PRS) modules

System Bus

• Up to two full-duplex universal asynchronous receiver

transmitters (UARTs)

Global Digital Interconnect

Global Analog Interconnect

• Multiple serial peripheral interface (SPI)masters or slaves

• Connectable to all general-purpose I/O (GPIO) pins

❐ Complex peripherals by combining blocks

SRAM

SROM Flash 16 KB

256 Bytes

Sleep and

Watchdog

CPU Core (M8C)

Interrupt

Controller

■ Precision, programmable clocking

❐ Internal 2.5% 24- / 48-MHz main oscillator

❐ 24- / 48-MHz with optional 32 kHz crystal

❐ Optional external oscillator up to 24 MHz

❐ Internal oscillator for watchdog and sleep

Multiple Clock Sources

(Includes IMO, ILO, PLL, and ECO)

DIGITAL SYSTEM

ANALOG SYSTEM

■ Flexible on-chip memory

Analog

Ref.

❐ 16 KB flash program storage 50,000 erase/write cycles

❐ 256-bytes SRAM data storage

❐ In-system serial programming (ISSP)

❐ Partial flash updates

Digital

Block

Array

Analog

Block

Array

Analog

Input

Muxing

❐ Flexible protection modes

❐ Electronically erasable programmable read only memory

(EEPROM) emulation in flash

■ Programmable pin configurations

POR and LVD Internal

Voltage

Switch

Mode

Pump

❐ 25-mA sink, 10-mA source on all GPIOs

❐ Pull-up, pull-down, high-Z, strong, or open-drain drive modes

on all GPIOs

❐ Eight standard analog inputs on GPIO, plus four additional

analog inputs with restricted routing

Digital

Clocks

Multiply

Accum.

Decimator

I C

System Resets

Ref.

SYSTEM RESOURCES

❐ Four 30-mA analog outputs on GPIOs

❐ Configurable interrupt on all GPIOs

Errata: For information on silicon errata, see “Errata” on page 61. Details include trigger conditions, devices affected, and proposed workaround.

Cypress Semiconductor Corporation

Document Number: 38-12012 Rev. AC

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised November 23, 2017

12 3 4 5 6 7...69

中文翻译

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与CY8C27443-24SXI相关器件

型号	品牌	获取价格	描述	数据表
CY8C27443-24SXIT	CYPRESS	获取价格	PSoC Mixed Signal Array
CY8C27466	CYPRESS	获取价格	PSoC⑩ Mixed Signal Array
CY8C27466-24PVXI	CYPRESS	获取价格	PSoC⑩ Mixed Signal Array
CY8C27466-24PVXIT	CYPRESS	获取价格	PSoC⑩ Mixed Signal Array
CY8C27466-24PXI	CYPRESS	获取价格	PSoC⑩ Mixed Signal Array
CY8C27466-24SXI	CYPRESS	获取价格	PSoC⑩ Mixed Signal Array
CY8C27466-24SXIT	CYPRESS	获取价格	PSoC⑩ Mixed Signal Array
CY8C27466-SPAXC	CYPRESS	获取价格	PSoC⑩ Mixed Signal Array
CY8C27466-SPAXE	CYPRESS	获取价格	PSoC⑩ Mixed Signal Array
CY8C27466-SPAXI	CYPRESS	获取价格	PSoC⑩ Mixed Signal Array

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