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CY8C20066-24LTXI PDF预览

CY8C20066-24LTXI

更新时间： 2024-02-11 08:53:28
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER /
页数 文件大小 规格书
40页 1776K
描述
MULTIFUNCTION PERIPHERAL, QCC48, 7 X 7 MM, 1 MM HEIGHT, MO-220, QFN-48

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CY8C20066-24LTXI 技术参数

生命周期：Active零件包装代码：QFN
包装说明：HVQCCN,针数：48
Reach Compliance Code：unknown风险等级：5.8
地址总线宽度：边界扫描：NO
总线兼容性：USB最大时钟频率：25.2 MHz
外部数据总线宽度：JESD-30 代码：S-XQCC-N48
长度：7 mmI/O 线路数量：36
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILERAM（字数）：2000
座面最大高度：1 mm最大供电电压：5.5 V
最小供电电压：1.71 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
宽度：7 mmBase Number Matches：1

CY8C20066-24LTXI 数据手册

 浏览型号CY8C20066-24LTXI的Datasheet PDF文件第1页浏览型号CY8C20066-24LTXI的Datasheet PDF文件第3页浏览型号CY8C20066-24LTXI的Datasheet PDF文件第4页浏览型号CY8C20066-24LTXI的Datasheet PDF文件第5页浏览型号CY8C20066-24LTXI的Datasheet PDF文件第6页浏览型号CY8C20066-24LTXI的Datasheet PDF文件第7页 
CY8C20X36/46/66/96  
CapSense® Applications  
Features  
■ 1.71V to 5.5V Operating Range  
■ Versatile Analog Mux  
❐ Common Internal Analog Bus  
❐ Simultaneous Connection of I/O  
❐ High PSRR Comparator  
❐ Low Dropout Voltage Regulator for All Analog Resources  
■ Low Power CapSense® Block  
❐ Configurable Capacitive Sensing Elements  
❐ Supports Combination of CapSense Buttons, Sliders,  
Touchpads, Touch Screens, and Proximity Sensor  
■ Additional System Resources  
❐ I2C Slave:  
■ Powerful Harvard Architecture Processor  
❐ M8C Processor Speeds Running to 24 MHz  
❐ Low Power at High Speed  
• Selectable to 50 kHz, 100 kHz, or 400 kHz  
• No Clock Stretching Required (under most conditions)  
❐ Interrupt Controller  
• Implementation During Sleep Modes with Less Than  
100 µA  
• Hardware Address Validation  
❐ SPI™ Master and Slave: Configurable 46.9 kHz to 12 MHz  
❐ Three 16-Bit Timers  
❐ Watchdog and Sleep Timers  
❐ Internal Voltage Reference  
❐ Integrated Supervisory Circuit  
❐ 8-bit Delta-Sigma Analog-to-Digital Converter  
❐ Temperature Range: -40°C to +85°C  
■ Flexible On-Chip Memory  
❐ Three Program/Data Storage Size Options:  
• CY8C20x36: 8K Flash / 1K SRAM  
• CY8C20x46, CY8C20x96: 16K Flash / 2K SRAM  
• CY8C20x66: 32K Flash / 2K SRAM  
❐ 50,000 Flash Erase/Write Cycles  
❐ Partial Flash Updates  
❐ Flexible Protection Modes  
❐ In-System Serial Programming (ISSP)  
❐ Two General Purpose High Speed, Low Power Analog  
Comparators  
■ Complete Development Tools  
❐ Free Development Tool (PSoC Designer™)  
❐ Full Featured, In-Circuit Emulator and Programmer  
❐ Full Speed Emulation  
❐ Complex Breakpoint Structure  
❐ 128K Trace Memory  
■ Full Speed USB  
❐ Available on CY8C20646, CY8C20666, CY8C20x96 Only  
❐ 12 Mbps USB 2.0 Compliant  
❐ Eight Unidirectional Endpoints  
❐ One Bidirectional Control Endpoint  
❐ Dedicated 512 Byte Buffer  
❐ Internally Regulated at 3.3V  
■ Package Options  
■ Precision, Programmable Clocking  
❐ CY8C20x36:  
• 16-Pin 3 x 3 x 0.6 mm QFN  
• 24-Pin 4 x 4 x 0.6 mm QFN  
• 32-Pin 5 x 5 x 0.6 mm QFN  
• 48-Pin SSOP  
• 48-Pin 7 x 7 x 1.0 mm QFN  
❐ CY8C20x46:  
• 16-Pin 3 x 3 x 0.6 mm QFN  
• 24-Pin 4 x 4 x 0.6 mm QFN  
• 32-Pin 5 x 5 x 0.6 mm QFN  
• 48-Pin SSOP  
❐ Internal Main Oscillator: 6/12/24 MHz ± 5%  
❐ Internal Low Speed Oscillator at 32 kHz for Watchdog and  
Sleep Timers  
❐ Precision 32 kHz Oscillator for Optional External Crystal  
❐ 0.25% Accuracy for USB with No External Components  
(CY8C20646, CY8C20666, CY8C20x96 only)  
■ Programmable Pin Configurations  
❐ Up to 36 GPIO (Depending on Package)  
❐ Dual Mode GPIO: All GPIO Support Digital I/O and Analog  
Input  
❐ 25 mA Sink Current on All GPIO  
• 48-Pin 7 x 7 x 1.0 mm QFN (with USB)  
❐ CY8C20x96:  
• 24-Pin 4 x 4 x 0.6 mm QFN (with USB)  
• 32-Pin 5 x 5 x 0.6 mm QFN (with USB)  
❐ CY8C20x66:  
• 32-Pin 5 x 5 x 0.6 mm QFN  
• 48-Pin 7 x 7 x 1.0 mm QFN (with USB)  
• 48-Pin SSOP  
❐ Pull up, High Z, Open Drain Modes on All GPIO  
❐ CMOS Drive Mode (5 mA Source Current) on Ports 0 and 1:  
• 20 mA (at 3.0V) Total Source Current on Port 0  
• 20 mA (at 3.0V) Total Source Current on Port 1  
❐ Selectable, Regulated Digital I/O on Port 1  
❐ Configurable Input Threshold on Port 1  
❐ Hot Swap Capability on all Port 1 GPIO  
Cypress Semiconductor Corporation  
Document Number: 001-12696 Rev. *F  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised September 09, 2009  
[+] Feedback  
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