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CY7C64713-56PVXC PDF预览

CY7C64713-56PVXC

更新时间: 2024-11-18 04:53:39
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
54页 1520K
描述
EZ-USB FX1⑩ USB Microcontroller Full-speed USB Peripheral Controller

CY7C64713-56PVXC 技术参数

是否Rohs认证:符合生命周期:Active
零件包装代码:SSOP包装说明:LEAD FREE, SSOP-56
针数:56Reach Compliance Code:compliant
ECCN代码:3A991.A.2HTS代码:8542.31.00.01
Factory Lead Time:1 week风险等级:1.84
Is Samacsys:N具有ADC:NO
地址总线宽度:位大小:8
CPU系列:8051最大时钟频率:24 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:JESD-30 代码:R-PDSO-G56
JESD-609代码:e4长度:18.415 mm
湿度敏感等级:3I/O 线路数量:24
端子数量:56最高工作温度:70 °C
最低工作温度:PWM 通道:NO
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP56,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
RAM(字节):16384ROM(单词):0
ROM可编程性:EEPROM座面最大高度:2.794 mm
速度:48 MHz子类别:Microcontrollers
最大压摆率:65 mA最大供电电压:3.45 V
最小供电电压:3.15 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.51 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

CY7C64713-56PVXC 数据手册

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CY7C64713  
EZ-USB FX1™ USB Microcontroller  
Full-speed USB Peripheral Controller  
Integrated, industry standard 8051 with enhanced features:  
Up to 48 MHz clock rate  
Features  
Single chip integrated USB transceiver, SIE, and enhanced  
8051 microprocessor  
Four clocks for each instruction cycle  
Two USARTS  
Fit, form, andfunctionupgradabletotheFX2LP(CY7C68013A)  
Pin compatible  
Three counters or timers  
Expanded interrupt system  
Two data pointers  
Object code compatible  
Functionally compatible (FX1 functionality is a Subset of the  
FX2LP)  
3.3V operation with 5V tolerant inputs  
Smart SIE  
Draws no more than 65 mA in any mode, making the FX1  
suitable for bus powered applications  
Vectored USB interrupts  
Software: 8051 runs from internal RAM, which is:  
Downloaded using USB  
Separate data buffers for the Setup and DATA portions of a  
CONTROL transfer  
Loaded from EEPROM  
Integrated I2C controller, running at 100 or 400 KHz  
48 MHz, 24 MHz, or 12 MHz 8051 operation  
Four integrated FIFOs  
External memory device (128 pin configuration only)  
16 KBytes of on-chip Code/Data RAM  
Four programmable BULK/INTERRUPT/ISOCHRONOUS  
endpoints  
Brings glue and FIFOs inside for lower system cost  
Automatic conversion to and from 16-bit buses  
Master or slave operation  
Buffering options: double, triple, and quad  
Additional programmable (BULK/INTERRUPT) 64-byte  
endpoint  
FIFOs can use externally supplied clock or asynchronous  
strobes  
8 or 16-bit external data interface  
Smart Media Standard ECC generation  
GPIF  
Easy interface to ASIC and DSP ICs  
Vectored for FIFO and GPIF interrupts  
Up to 40 General Purpose IOs (GPIO)  
Four package options:  
128 pin TQFP  
Allows direct connection to most parallel interfaces; 8 and  
16-bit  
Programmable waveform descriptors and configuration  
registers to define waveforms  
100 pin TQFP  
Supports multiple Ready (RDY) inputs and Control (CTL) out-  
puts  
56 pin SSOP  
56 pin QFN Pb-free  
Cypress Semiconductor Corporation  
Document #: 38-08039 Rev. *E  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised February 06, 2008  
[+] Feedback  

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