92A
CY7C291A
2K x 8 Reprogrammable PROM
Features
Functional Description
• Windowed for reprogrammability
• CMOS for optimum speed/power
• High speed
The CY7C291A is a high-performance 2K-word by 8-bit
CMOS PROM. It is packaged in a 300-mil ceramic package
which may be equipped with an erasure window; when
exposed to UV light the PROM is erased and can then be
reprogrammed. The memory cells utilize proven EPROM
— 20 ns (Commercial)
floating-gate
programming algorithms.
technology
and
byte-wide
intelligent
— 35 ns (Military)
• Low power
The CY7C291A is a plug-in replacement for bipolar devices
and offers the advantage of lower power, reprogrammability,
superior performance and programming yield. The EPROM
cell requires only 12.5V for the supervoltage and low current
requirements allow for gang programming. The EPROM cells
allow for each memory location to be tested 100%, as each
location is written into, erased, and repeatedly exercised prior
to encapsulation. Each PROM is also tested for AC perfor-
mance to guarantee that after customer programming the
product will meet DC and AC specification limits.
— 660 mW (Commercial and Military)
• Low standby power
— 220 mW (Commercial and Military)
• EPROM technology 100% programmable
• Slim 300-mil or standard 600-mil packaging available
• 5V ±10% VCC, commercial and military
• TTL-compatible I/O
• Direct replacement for bipolar PROMs
• Capable of withstanding >2001V static discharge
A read is accomplished by placing an active LOW signal on
CS1, and active HIGH signals on CS2 and CS3. The contents
of the memory location addressed by the address line
(A0−A10) will become available on the output lines (O0−O7).
Logic Block Diagram
Pin Configurations
A
0
DIP
Top View
O
O
7
LCC/PLCC (Opaque Only)
Top View
A
1
PROGRAM-
MABLE
A
2
MULTI-
PLEXER
ROW
6
V
CC
A
1
2
3
4
5
6
7
8
9
7
24
23
22
ADDRESS
A
3
ARRAY
A
8
A
6
A
9
A
5
A
4
7C291A
O
5
O
4
O
3
3
2 1 2827
4
26
25
A
10
A
4
21
20
19
18
17
A
10
A
A
5
5
6
7
8
9
10
11
4
CS
CS
CS
1
A
3
1
24
23
22
21
20
19
A
3
2
7C291A
ADDRESS
DECODER
CS
A
2
3
A
6
2
A
2
CS
A
1
CS
A
3
1
A
7
A
NC
0
A
0
O
O
7
NC
O
0
O
7
A
8
O
6
O
0
O
1
O
2
6
16
15
14
13
1314151617 18
12
O
10
11
12
5
COLUMN
ADDRESS
A
9
O
2
O
1
O
4
GND
O
3
A
10
POWER
DOWN
7C293A
Window available
O
0
CS
1
CS
2
CS
3
Cypress Semiconductor Corporation
Document #: 38-04011 Rev. *A
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Revised October 8, 2002