1CY7C292A
CY7C291A
CY7C292A/CY7C293A
2K x 8 Reprogrammable PROM
identical, but are packaged in 300-mil (7C291A, 7C293A) and
600-mil wide plastic and hermetic DIP packages (7C292A).
The CY7C293A has an automatic power down feature which
reduces the power consumption by over 70% when deselect-
ed. The 300-mil ceramic package may be equipped with an
erasure window; when exposed to UV light the PROM is
erased and can then be reprogrammed. The memory cells uti-
lize proven EPROM floating-gate technology and byte-wide in-
telligent programming algorithms.
Features
•
•
•
Windowed for reprogrammability
CMOS for optimum speed/power
High speed
— 20 ns (commercial)
— 25 ns (military)
The CY7C291A, CY7C292A, and CY7C293A are plug-in re-
placements for bipolar devices and offer the advantages of
lower power, reprogrammability, superior performance and
programming yield. The EPROM cell requires only 12.5V for
the supervoltage and low current requirements allow for gang
programming. The EPROM cells allow for each memory loca-
tion to be tested 100%, as each location is written into, erased,
and repeatedly exercised prior to encapsulation. Each PROM
is also tested for AC performance to guarantee that after cus-
tomer programming the product will meet DC and AC specifi-
cation limits.
•
•
Low power
— 660 mW (commercial and military)
Low standby power
— 220 mW (commercial and military)
•
•
•
EPROM technology 100% programmable
Slim 300-mil or standard 600-mil packaging available
5V ±10% V , commercial and military
CC
•
•
•
TTL-compatible I/O
A read is accomplished by placing an active LOW signal on
Direct replacement for bipolar PROMs
Capable of withstanding >2001V static discharge
CS , and active HIGH signals on CS and CS . The contents
1
2
3
of the memory location addressed by the address line (A
−
0
A
) will become available on the output lines (O − O ).
10
0 7
Functional Description
The CY7C291A, CY7C292A, and CY7C293A are high-perfor-
mance 2K-word by 8-bit CMOS PROMs. They are functionally
Logic Block Diagram
Pin Configurations
A
0
DIP
Top View
O
7
LCC/PLCC (Opaque Only)
Top View
A
1
PROGRAM-
MABLE
ARRAY
A
MULTI-
PLEXER
2
ROW
O
6
V
A
1
2
3
4
5
6
7
8
9
CC
24
23
22
7
ADDRESS
A
3
A
8
A
6
A
9
A
5
A
4
7C291A
7C292A
7C293A
O
O
O
5
3
2 1 2827
4
26
25
A
10
A
21
20
19
18
17
A
4
10
A
A
5
5
6
7
8
9
4
CS
CS
CS
A
3
1
24
A
1
3
7C291A
ADDRESS
DECODER
CS
4
A
23
22
21
20
19
2
A
6
2
2
A
2
CS
3
A
1
CS
A
3
1
A
7
A
NC
0
A
0
O
O
7C293A
7
NC
O
0
O
7
3
10
11
A
8
O
6
O
0
O
1
O
2
6
16
15
14
13
1314151617 18
12
O
10
11
12
5
COLUMN
ADDRESS
A
9
O
2
O
1
O
4
GND
O
3
A
10
POWER
DOWN
C291A-3
C291A-2
7C293A
Window available on
7C291A and 7C293A
only.
O
0
CS
1
CS
2
CS
3
C291A-1
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
March 1986 – Revised May 1993
•
408-943-2600
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