5秒后页面跳转
CY7C151*V18 PDF预览

CY7C151*V18

更新时间: 2024-02-14 15:40:24
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 双倍数据速率
页数 文件大小 规格书
8页 244K
描述
RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata

CY7C151*V18 数据手册

 浏览型号CY7C151*V18的Datasheet PDF文件第1页浏览型号CY7C151*V18的Datasheet PDF文件第3页浏览型号CY7C151*V18的Datasheet PDF文件第4页浏览型号CY7C151*V18的Datasheet PDF文件第5页浏览型号CY7C151*V18的Datasheet PDF文件第6页浏览型号CY7C151*V18的Datasheet PDF文件第7页 
Item  
2.  
Issue  
Device  
Fix Status  
9Mb - “D” Rev - Ram9 The fix has been implemented on  
18Mb - “B” Rev - Ram9 the new revision and is now avail-  
36Mb - “A” Rev - Ram9 able.  
72Mb - Ram9  
QDR-I/DDR-I/  
QDR-II/DDR-II Devices  
O/P Buffer enters a locked up unde-  
fined state after controls or clocks are  
left floating. No proper read/write  
access can be done on the device  
until a dummy read is performed.  
9Mb - “D” Rev - Ram9 The fix involved bypassing the ZQ  
18Mb - “B” Rev - Ram9 circuitry in JTAG mode. This was  
36Mb - “A” Rev - Ram9 done by overriding the ZQ circuit-  
3.  
The EXTEST function in the JTAG  
test fails when input K clock is floating  
in the JTAG mode.  
72Mb - Ram9  
ry by the JTAG signal. The fix has  
been implemented on the new re-  
vision and is now available.  
QDR-I/DDR-I/  
QDR-II/DDR-II Devices  
Table 2. Issue Definition and fix status for different devices  
1. DOFF Pin Issue  
• ISSUE DEFINITION  
This issue involves the DLL not turning ON properly if a large resistor is used (eg:-10K) as an external pullup  
resistor to enable the DLL. If a 10Kor higher pullup resistor is used externally, the voltage on DOFF is not  
high enough to enable the DLL.  
• PARAMETERS AFFECTED  
The functionality of the device will be affected because of the DLL is not turning ON properly. When the DLL  
is enabled, all AC and DC parameters on the datasheet are met.  
• TRIGGER CONDITION(S)  
Having a 10Kor higher external pullup resistor for disabling the DOFF pin.  
• SCOPE OF IMPACT  
This issue will alter the normal functionality of the QDRII/DDRII devices when the DLL is disabled.  
EXPLANATION OF ISSUE  
Figure 1 shows the DOFF pin circuit with an internal 5Kinternal resistor. The fix planned is to disable the  
internal 5Kleaker.  
Figure 1. DOFF pin with the 5Kinternal resistor  
• WORKAROUND  
Document #: 001-06217 Rev. *C  
Page 2 of 8  

与CY7C151*V18相关器件

型号 品牌 获取价格 描述 数据表
CY7C1510AV18 CYPRESS

获取价格

72-Mbit QDR-II⑩ SRAM 2-Word Burst Architectur
CY7C1510AV18_07 CYPRESS

获取价格

72-Mbit QDR⑩-II SRAM 2-Word Burst Architectur
CY7C1510AV18_09 CYPRESS

获取价格

72-Mbit QDR-II SRAM 2-Word Burst Architecture
CY7C1510AV18-167BZC CYPRESS

获取价格

72-Mbit QDR-II⑩ SRAM 2-Word Burst Architectur
CY7C1510AV18-167BZI CYPRESS

获取价格

72-Mbit QDR-II⑩ SRAM 2-Word Burst Architectur
CY7C1510AV18-167BZXC CYPRESS

获取价格

72-Mbit QDR-II⑩ SRAM 2-Word Burst Architectur
CY7C1510AV18-167BZXI CYPRESS

获取价格

72-Mbit QDR-II⑩ SRAM 2-Word Burst Architectur
CY7C1510AV18-200BZC CYPRESS

获取价格

72-Mbit QDR-II⑩ SRAM 2-Word Burst Architectur
CY7C1510AV18-200BZI CYPRESS

获取价格

72-Mbit QDR-II⑩ SRAM 2-Word Burst Architectur
CY7C1510AV18-200BZXC CYPRESS

获取价格

72-Mbit QDR-II⑩ SRAM 2-Word Burst Architectur