Datasheet > CY7C1386DV25-167BGI

CY7C1386DV25-167BGI

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器
页数	文件大小	规格书
29页	536K
描述
Cache SRAM, 512KX36, 3.4ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, BGA-119

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CY7C1386DV25

CY7C1387DV25

Document History Page

Document Title: CY7C1386DV25/CY7C1387DV25 18-Mbit (512K x 36/1M x 18)

Pipelined DCD Sync SRAM

Document Number: 38-05548

Orig. of

REV.

ECN NO. Issue Date Change

Description of Change

254550

288531

See ECN

RKF

SYT

New data sheet

Edited description under “IEEE 1149.1 Serial Boundary Scan (JTAG)” for

non-compliance with 1149.1

Removed 225 Mhz Speed Bin

Added lead-free information for 100-Pin TQFP, 119 BGA and 165 FBGA

Packages

Added comment of ‘Lead-free BG packages availability’ below the Ordering

Information

326078

See ECN

PCI

Address expansion pins/balls in the pinouts for all packages are modified as

per JEDEC standard

Added description on EXTEST Output Bus Tri-State

Changed description on the Tap Instruction Set Overview and Extest

Changed Device Width (23:18) for 119-BGA from 000110 to 101110

Added separate row for 165 -FBGA Device Width (23:18)

Changed Θ_JAand Θ_JCfor TQFP Package from 31 and 6 °C/W to 28.66 and

4.08 °C/W respectively

Changed Θ_JAand Θ_JCfor BGA Package from 45 and 7 °C/W to 23.8 and 6.2

°C/W respectively

Changed Θ_JAand Θ_JCfor FBGA Package from 46 and 3 °C/W to 20.7 and

4.0 °C/W respectively

Modified V_OL,V_OHtest conditions

Removed shading on DC Table for 200 MHz speed bin

Removed comment of ‘Lead-free BG packages availability’ below the

Ordering Information

418125

See ECN

NXR

Changed address of Cypress Semiconductor Corporation on Page# 1 from

“3901 North First Street” to “198 Champion Court”

Changed the description of I_Xfrom Input Load Current to Input Leakage

Current on page# 18

Changed the I_Xcurrent values of MODE on page # 18 from –5 µA and 30 µA

to –30 µA and 5 µA

Changed the I_Xcurrent values of ZZ on page # 18 from –30 µA and 5 µA

to °5 µA and 30 µA

Changed V_IH< V_DDto V_IH< V_DDon page # 18

Updated Ordering Information Table

475009

See ECN

VKN

Converted from Preliminary to Final.

Added the Maximum Rating for Supply Voltage on V_DDQRelative to GND

Changed t_TH, t_TLfrom 25 ns to 20 ns and t_TDOVfrom 5 ns to 10 ns in TAP

AC Switching Characteristics table.

Updated the Ordering Information table.

Document #: 38-05548 Rev. *D

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与CY7C1386DV25-167BGI相关器件

型号	品牌	描述	获取价格	数据表
CY7C1386DV25-167BGXC	CYPRESS	Cache SRAM, 512KX36, 3.4ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, LEAD FREE, BGA-119	获取价格
CY7C1386DV25-167BGXI	CYPRESS	暂无描述	获取价格
CY7C1386DV25-167BZC	CYPRESS	18-Mbit (512K x 36/1M x 18) Pipelined DCD Sync SRAM	获取价格
CY7C1386DV25-167BZI	CYPRESS	18-Mbit (512K x 36/1M x 18) Pipelined DCD Sync SRAM	获取价格
CY7C1386DV25-167BZXC	CYPRESS	18-Mbit (512K x 36/1M x 18) Pipelined DCD Sync SRAM	获取价格
CY7C1386DV25-167BZXI	CYPRESS	18-Mbit (512K x 36/1M x 18) Pipelined DCD Sync SRAM	获取价格