是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Obsolete | 零件包装代码: | BGA |
包装说明: | LBGA, BGA100,10X10,40 | 针数: | 100 |
Reach Compliance Code: | compliant | ECCN代码: | EAR99 |
HTS代码: | 8542.31.00.01 | Factory Lead Time: | 1 week |
风险等级: | 5.63 | 其他特性: | CONFIGURABLE AS SINGLE ENDED TTL ALSO |
系列: | 7B | 输入调节: | DIFFERENTIAL MUX |
JESD-30 代码: | S-PBGA-B100 | JESD-609代码: | e1 |
长度: | 11 mm | 逻辑集成电路类型: | PLL BASED CLOCK DRIVER |
最大I(ol): | 0.002 A | 湿度敏感等级: | 3 |
功能数量: | 1 | 反相输出次数: | |
端子数量: | 100 | 实输出次数: | 16 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
输出特性: | 3-STATE | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | LBGA | 封装等效代码: | BGA100,10X10,40 |
封装形状: | SQUARE | 封装形式: | GRID ARRAY, LOW PROFILE |
峰值回流温度(摄氏度): | 260 | 电源: | 3.3 V |
Prop。Delay @ Nom-Sup: | 0.5 ns | 传播延迟(tpd): | 0.5 ns |
认证状态: | Not Qualified | Same Edge Skew-Max(tskwd): | 0.8 ns |
座面最大高度: | 1.4 mm | 子类别: | Clock Drivers |
最大供电电压 (Vsup): | 3.63 V | 最小供电电压 (Vsup): | 2.97 V |
标称供电电压 (Vsup): | 3.3 V | 表面贴装: | YES |
温度等级: | INDUSTRIAL | 端子面层: | Tin/Silver/Copper (Sn/Ag/Cu) |
端子形式: | BALL | 端子节距: | 1 mm |
端子位置: | BOTTOM | 处于峰值回流温度下的最长时间: | 30 |
宽度: | 11 mm | 最小 fmax: | 200 MHz |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
CY7B994V-5BBXIT | CYPRESS |
获取价格 |
High-speed Multi-phase PLL Clock Buffer | |
CY7B994V-7AC | CYPRESS |
获取价格 |
High-Speed Multi-Phase PLL Clock Buffer | |
CY7B995 | CYPRESS |
获取价格 |
2.5/3.3V 200-MHz High-Speed Multi-Phase PLL Clock Buffer | |
CY7B995_07 | CYPRESS |
获取价格 |
2.5/3.3V 200-MHz High-Speed Multi-Phase PLL Clock Buffer | |
CY7B995_11 | CYPRESS |
获取价格 |
2.5/3.3 V 200-MHz High-Speed Multi-Phase PLL Clock Buffer | |
CY7B9950 | CYPRESS |
获取价格 |
2.5/3.3V, 200-MHz High-Speed Multi-Phase PLL Clock Buffer | |
CY7B9950_06 | CYPRESS |
获取价格 |
2.5/3.3V, 200-MHz High-Speed Multi-Phase PLL Clock Buffer | |
CY7B9950_07 | CYPRESS |
获取价格 |
2.5/3.3V, 200 MHz High-Speed Multi-Phase PLL Clock Buffer | |
CY7B9950AC | CYPRESS |
获取价格 |
2.5/3.3V, 200-MHz High-Speed Multi-Phase PLL Clock Buffer | |
CY7B9950ACT | CYPRESS |
获取价格 |
2.5/3.3V, 200-MHz High-Speed Multi-Phase PLL Clock Buffer |