Datasheet > CY39100V256-233MGI

CY39100V256-233MGI

更新时间： 2022-11-26 15:09:56

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
86页	1209K
描述
CPLDs at FPGA Densities

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CY39100V256-233MGI 数据手册

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Delta39K™ ISR™

CPLD Family

Delta39K Speed Bins^[3]

Device

39K30

V_CC

233

200

181

125

3.3/2.5V

39K50

39K100

39K165

39K200

Device Package Offering and I/O Count Including Dedicated Clock and Control Inputs

Self-Boot Solution^[4]

208 EQFP

256 FBGA

484-FBGA

256-FBGA

388-BGA

484-FBGA

676-FBGA

28 × 28 mm

17 × 17 mm

23 × 23 mm

17 × 17 mm

35 × 35 mm

23 × 23 mm

27 × 27 mm

Device 0.5-mm pitch 1.0-mm pitch 1.0-mm pitch 1.0-mm pitch 1.27-mm pitch 1.0-mm pitch 1.0-mm pitch

39K30

39K50

136

174

180

174

218

294

218

39K100

39K165

39K200

302

356

368

302

386

428

Notes:

3. Speed bins shown here are for commercial operating range. Please refer to Delta39K ordering information on industrial-range speed bins on page 38.

4. Self-boot solution integrates the boot PROM (flash memory) with Delta39K die inside the same package. This flash memory can endure at least 10,000

programming/erase cycles and can retain data for at least 100 years.

Document #: 38-03039 Rev. *H

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与CY39100V256-233MGI相关器件

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CY39100V256-83BBI	CYPRESS	Loadable PLD, 15ns, CMOS, PBGA256, 17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, FBGA-256	获取价格
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CY39100V388-125MGC	CYPRESS	CPLDs at FPGA Densities	获取价格
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