Delta39K™ ISR™
CPLD Family
PRELIMINARY
Change
#
Revision
Date
Revision Description
30)
Updated Isb spec and miscellaneous edits on first 3 pages; released first 3 pages as “Advance
Information” data sheet on 2/1/00 on the web and Cypress CD-ROM
3/4/2000
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Updated the PLL arch. diagram and description to reflect recent arch. changes
Changed the name of “352-BGA” to “388-BGA”
3/4
3/4
3/4
3/4
3/4
3/4
3/4
3/4
3/4
3/4
3/4
3/4
5/11
5/11
Misc. text edits in the “Programming” section on p. 13
Reduced the Tj from 95C to 85C for comm and from 130C to 100C (p.14)
Vccjtag, Vcccnfg, Vccpll, Vccprg
Added
Added
Added
specs (p. 14)
Vdrint, Vdrio
specs (p. 14)
5 notes on Power-up sequence
(p. 15)
Added tCHMCHAA, tCHMFS, tCHMFH timing parameters
Lowered tCLMCYC3, tCHMCLK, tCHMFS, tCHMCYC3, tMACCHMS1
Edited the Timing waveforms to reflect consistency in parameter names
specs to meet design
Fixed 208-PQFP pinout diagram to reflect the latest pinout changes (p.34)
(352BGA -> 388BGA)
Part Numbers & Ordering info
Added part ordering info for 39K15, 39K30 and updated the rest
Removed the Pin Tables for all packages and all devices and created a new spec (#38-00982) titled
“Delta39K Pin Tables”
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66)
Added f
to the Family Members table (p.1)
5/11
5/11
5/11
5/23
5/11
5/11
5/14
5/14
5/14
5/14
5/14
5/14
5/14
5/14
5/14
5/14
5/14
5/15
6/23
6/23
6/23
7/28
MAX2
Increased Typical gate count per new formula (p.1)
Added package dimensions to “Device package offering” Table (p.2)
Miscellaneous edits in the “General Description” section (p. 4-13)
Added t
parameter (p. 15)
RECONFIG
Split the max. rating for VCC to ground potential for 39kZ and 39KV device (p.14)
Added t , t , parameters for NoBL/ZBT compatibility as per RHR’s 5/12/00 memo
CHZ CLZ
Put values for t
, t
parameter as per RHR’s 5/12/00 memo
SCS2PT MCCD
Modified tMCSPT, tMCHPT, tMCCOPT specs as per RHR’s 5/12/00 memo
Reduced t
specs as per RHR’s 5/12/00 memo
specs as per RHR’s 5/12/00 memo
CHMMACS
Increased t
MACCHMS
Added t
parameter as per RHR’s 5/12/00 memo
CHMFRDV
Increased tCLMHD, tCHMHD, tCHMS as per RHR’s 5/12/00 memo
Added t (to replace tADDMS - the arbitration param) as per RHR’s 5/12/00 memo
CHMBA
Increased tCHMCHAA, tCHMMACS1, tMACCHMS2 as per RHR’s 5/12/00 memo
Changed name of tCHMRS to tCHMFRS and tCHMRSF to tCHMFRSF to indicate FIFO params
added Serial Boot EEPROM Part Numbers (p. 43)
removed package diagrams for all packages
Added “I/O standards delay adjustment table” (p.21)
Updated timing waveforms for Cluster memory & FIFO
Miscellaneous edits in the “General Description” section (p. 4-13)
Updated “I/O standards delay adjustment table” (p.21)
NoBL, PIM, Spread Aware,
Corporation.
, AnyVolt, Self-Boot, In-System Reprogrammable, ISR, and Delta39K are trademarks of Cypress Semiconductor
Warp
ZBT is a trademark of IDT. QDR is a trademark of Micron, IDT, and Cypress Semiconductor Corporation.
SpeedWave, and ViewDraw are trademarks of ViewLogic.
Document #: 38-00830-B
© Cypress Semiconductor Corporation, 2000. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
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