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CY25702LXIZZZT

更新时间: 2024-11-25 03:07:07
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 振荡器晶体振荡器时钟发生器微控制器和处理器外围集成电路石英晶振
页数 文件大小 规格书
6页 215K
描述
Programmable High-Frequency Crystal Oscillator (XO)

CY25702LXIZZZT 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:LCC
包装说明:QCCN,针数:4
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.8
Is Samacsys:NJESD-30 代码:R-CQCC-N4
JESD-609代码:e4长度:5 mm
端子数量:4最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:166 MHz
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装形状:RECTANGULAR封装形式:CHIP CARRIER
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.3 mm最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:NICKEL GOLD
端子形式:NO LEAD端子节距:2.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:3.2 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

CY25702LXIZZZT 数据手册

 浏览型号CY25702LXIZZZT的Datasheet PDF文件第2页浏览型号CY25702LXIZZZT的Datasheet PDF文件第3页浏览型号CY25702LXIZZZT的Datasheet PDF文件第4页浏览型号CY25702LXIZZZT的Datasheet PDF文件第5页浏览型号CY25702LXIZZZT的Datasheet PDF文件第6页 
CY25702  
Programmable High-Frequency Crystal Oscillator (XO)  
Features  
Benefits  
• Programmable High-frequency Crystal Oscillator (XO)  
• Wide operating output clock frequency range of 1–166 MHz  
• Integrated phase-locked loop (PLL)  
• Internal PLL to generate up to 166 MHz output  
• Suitable for most PC, consumer, and networking  
applications  
• Application compatibility in standard and low-power  
systems  
• 85 ps typical cycle-to-cycle Jitter with CLK = 133 MHz  
• 3.3V operation  
• CY25701 can be used as a direct replacement without any  
PCBmodificationifspreadspectrumclock(SSC)isrequired  
for EMI reduction.  
• Output Enable and Power-down functions  
• Package available in 4-Pin Ceramic LCC SMD  
• Pb-free package  
• In-house programming of samples and prototype quantities  
is available using CY3672 programming kit and CY3724  
socket adapters. Production quantities are available  
through Cypress’s value-added distribution partners or by  
usingthird-partyprogrammersfromBPMicrosystems, HiLo  
Systems, and others.  
• Industrial Temperature from –40°C to 85°C  
• For SSCG functionality refer to CY25701 data sheet  
Pin Configuration  
Logic Block Diagram  
CY25702  
RFB  
4-pin Ceramic SMD  
PLL  
4
3
VDD  
CLK  
CXIN  
OUTPUT  
DIVIDERS  
and  
PROGRAMMABLE  
CONFIGURATION  
OE/PD#  
1
VSS  
2
3
CLK  
MUX  
CXOUT  
1
OE/PD#  
4
2
VDD  
VSS  
Cypress Semiconductor Corporation  
Document #: 38-07721 Rev. *C  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised December 07, 2006  

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