APPENDIX E REVISION HISTORY
(3/3)
Page
p. 315
Description
Modification of description in (1) Registers to be used in 16.4.2 3-wire serial I/O mode
Modification of Table 16-3 Register Settings
p. 317
p. 319
Partial modification of Figure 17-1 Block Diagram of Serial Interface CSI1
Partial modification of Figure 17-3 Format of Serial Clock Select Register 1 (CSIC1)
Modification of description in (1) Registers to be used in 17.4.2 3-wire serial I/O mode
Addition of (5) SO1 output to 17.4.2 3-wire serial I/O mode
p. 321
p. 324
p. 331
pp. 362 to 366
p. 367
Modification of Figure 18-21 Master Operation Flowchart
Modification of (2) Slave operation in 18.5.15 Communication operations
Addition of Table 19-3 Ports Corresponding to EGPn and EGNn
p. 404
p. 406
Modification of part of description in 19.4.1 Non-maskable interrupt request acknowledgment
operation
p. 409
p. 419
Modification of part of description in 19.4.2 Maskable interrupt request acknowledgment operation
Addition of Note to Figure 20-2 Format of Memory Expansion Mode Register (MEM) and addition of
Figure 20-3 Pins Specified for Address (with µPD780076 and 780076Y)
p. 442
p. 467
Partial modification of Table 23-3 Communication Mode List
Revision of CHAPTER 25 ELECTRICAL SPECIFICATIONS (EXPANDED-SPECIFICATION PRODUCTS
OF µPD780076, 780078, 78F0078)
p. 498
Addition of CHAPTER 26 ELECTRICAL SPECIFICATIONS (EXPANDED-SPECIFICATION PRODUCTS
OF µPD780076Y, 780078Y, 78F0078Y)
p. 527
Revision of CHAPTER 27 ELECTRICAL SPECIFICATIONS (CONVENTIONAL PRODUCTS)
Partial modification of Table 29-1 Surface Mounting Type Soldering Conditions
p. 559
pp. 564, 565
Deletion of B.7 Embedded Software and B.8 System Upgrade from Former In-circuit Emulator for
in previous edition 78K/0 Series to IE-78001-R-A in the previous edition
588
User’s Manual U14260EJ3V1UD