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CS8182/D PDF预览

CS8182/D

更新时间: 2024-02-20 01:37:28
品牌 Logo 应用领域
其他 - ETC 驱动器稳压器
页数 文件大小 规格书
8页 76K
描述
Micropower 200 mA Low Dropout Tracking Regulator/Line Driver

CS8182/D 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:TO-252包装说明:, SMSIP5H,.37,50TB
针数:5Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:1.42
可调性:ADJUSTABLE最大回动电压 1:0.6 V
标称回动电压 1:0.35 V最大绝对输入电压:45 V
JESD-30 代码:R-PSSO-G4JESD-609代码:e3
长度:6.54 mm最大电网调整率 (%/V):0.023
最大负载调整率 (%):0.5%湿度敏感等级:1
功能数量:1输出次数:1
端子数量:4工作温度TJ-Max:125 °C
工作温度TJ-Min:-40 °C最大输出电流 1:0.2 A
最大输出电压 1:45 V最小输出电压 1:2.8 V
封装主体材料:PLASTIC/EPOXY封装等效代码:SMSIP5H,.37,50TB
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified调节器类型:ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度:2.38 mm子类别:Other Regulators
表面贴装:YES技术:BIPOLAR
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:1.14 mm端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.095 mm

CS8182/D 数据手册

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CS8182  
Micropower 200 mA  
Low Dropout Tracking  
Regulator/Line Driver  
The CS8182 is a monolithic integrated low dropout tracking  
regulator designed to provide adjustable buffered output voltage that  
closely tracks (±10 mV) the reference input. The output delivers up to  
200 mA while being able to be configured higher, lower or equal to the  
reference voltages.  
The output has been designed to operate over a wide range (2.8 V to  
45 V) while still maintaining excellent DC characteristics. Because of  
the CS8182’s high voltage capability, the part will fit into today’s new  
42 V automotive systems. The CS8182 is protected from reverse  
battery, short circuit and thermal runaway conditions. The device also  
can withstand 45 V load dump transients and –50 V reverse polarity  
input voltage transients. This makes it suitable for use in automotive  
environments.  
http://onsemi.com  
8
1
SO–8  
DF SUFFIX  
CASE 751  
1
5
2
The V /ENABLE lead serves two purposes. It is used to provide  
D PAK 5–PIN  
REF  
DPS SUFFIX  
CASE 936A  
the input voltage as a reference for the output and it also can be pulled  
low to place the device in sleep mode where it nominally draws less  
than 30 µA from the supply.  
PIN CONNECTIONS AND  
MARKING DIAGRAMS  
Features  
200 mA Source Capability  
1
V
GND  
GND  
V
IN  
OUT  
Output Tracks within ±10 mV Worst Case  
Low Dropout (0.35 V typ. @ 200 mA)  
Low Quiescent Current  
GND  
GND  
Adj  
V
REF  
/ENABLE  
GND  
Thermal Shutdown  
Short Circuit Protection  
Wide Operating Range  
Internally Fused Leads in SO–8 Package  
Tab  
Pin 1. V  
2. V  
IN  
CS8182  
AWLYWW  
OUT  
3. GND  
4. Adj  
5. V  
REF  
1
V
IN  
V
OUT  
ESD  
ESD  
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
Current Limit &  
SAT Sense  
WW, W = Work Week  
Adj  
ENABLE  
ORDERING INFORMATION*  
+
V /ENABLE  
REF  
Device  
Package  
Shipping  
ESD  
CS8182YDF8  
95 Units/Rail  
2500 Tape & Reel  
50 Units/Rail  
SO–8  
SO–8  
+
CS8182YDFR8  
CS8182YDPS5  
CS8182YDPSR5  
GND  
2
D PAK 5–PIN  
Thermal  
Shutdown  
2
750 Tape & Reel  
D PAK 5–PIN  
2.0 V  
* Consult your local sales representative for  
SO–8 with exposed pads package option.  
Figure 1. Block Diagram  
Semiconductor Components Industries, LLC, 2001  
1
Publication Order Number:  
CS8182/D  
April, 2001 – Rev. 13  

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