Datasheet > CS42L51_07

CS42L51_07

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
凌云 - CIRRUS		解码器编解码器放大器
页数	文件大小	规格书
88页	1582K
描述
Low Power, Stereo CODEC with Headphone Amp

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数据手册

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CS42L51_07 数据手册

CS42L51

1. PIN DESCRIPTIONS - SOFTWARE (HARDWARE) MODE

LRCK

SDA/CDIN (MCLKDIV2)

SCL/CCLK (I²S/LJ)

ADO/CS (DEM)

AIN1B

AIN1A

AFILTB

AFILTA

CS42L51

VA_HP

AIN2B/BIAS

AIN2A

FLYP

GND_HP

FLYN

MICIN2/BIAS/AIN3B

MICIN1/AIN3A

Pin Name

Pin Description

Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the

serial audio data line.

LRCK

Serial Control Data (Input/Output) - SDA is a data I/O in I²C Mode. CDIN is the input data line for the

control port interface in SPI Mode.

SDA/CDIN

(MCLKDIV2)

MCLK Divide by 2 (Input) - Hardware Mode: Divides the MCLK by 2 prior to all internal circuitry.

Serial Control Port Clock (Input) - Serial clock for the serial control port.

SCL/CCLK

(I²S/LJ)

Interface Format Selection (Input) - Hardware Mode: Selects between I²S & Left-Justified interface for-

mats for the ADC & DAC.

Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C Mode; CS

is the chip-select signal for SPI format.

AD0/CS

(DEM)

De-Emphasis (Input) - Hardware Mode: Enables/disables the de-emphasis filter.

VA_HP

FLYP

Analog Power For Headphone (Input) - Positive power for the internal analog headphone section.

Charge Pump Cap Positive Node (Input) - Positive node for the external charge pump capacitor.

Analog Ground (Input) - Ground reference for the internal headphone/charge pump section.

Charge Pump Cap Negative Node (Input) - Negative node for the external charge pump capacitor.

GND_HP

FLYN

Negative Voltage From Charge Pump (Output) - Negative voltage rail for the internal analog head-

phone section.

VSS_HP

DS679F1

1...4 5 678 9 10...88

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