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CS42L52-DNZ PDF预览

CS42L52-DNZ

更新时间: 2024-02-27 15:57:49
品牌 Logo 应用领域
凌云 - CIRRUS 解码器编解码器放大器
页数 文件大小 规格书
82页 1808K
描述
2Low-power, Stereo CODEC w/ Headphone & Speaker Amps

CS42L52-DNZ 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:QFN包装说明:HVQCCN, LCC40,.24SQ,20
针数:40Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.27
其他特性:ALSO REQUIRES AN SUPPLY OF 1.6V TO 5.25V商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:S-XQCC-N40长度:6 mm
功能数量:1端子数量:40
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC40,.24SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.8/2.5 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Other Consumer ICs
最大供电电压 (Vsup):2.63 V最小供电电压 (Vsup):1.65 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6 mm

CS42L52-DNZ 数据手册

 浏览型号CS42L52-DNZ的Datasheet PDF文件第2页浏览型号CS42L52-DNZ的Datasheet PDF文件第3页浏览型号CS42L52-DNZ的Datasheet PDF文件第4页浏览型号CS42L52-DNZ的Datasheet PDF文件第5页浏览型号CS42L52-DNZ的Datasheet PDF文件第6页浏览型号CS42L52-DNZ的Datasheet PDF文件第7页 
DRAFTv1  
5/13/08  
CS42L52  
Low-power, Stereo CODEC w/ Headphone & Speaker Amps  
Stereo CODEC  
Class D Stereo/Mono Speaker Amplifier  
 High Performance Stereo ADC & DAC  
 No External Filter Required  
99 dB (ADC), 98 dB (DAC) Dyn. Range (A-wtd)  
 High-power Stereo Output at 10% THD+N  
-88 dB THD+N  
2 x 1.00 W into 8 @ 5.0 V  
2 x 550 mW into 8 @ 3.7 V  
2 x 230 mW into 8 @ 2.5 V  
 Flexible Stereo Analog Input Architecture  
4:1 Analog Input MUX  
 High-power Mono Output at 10% THD+N  
Analog Input Mixing  
1 x 1.90 W into 4 @ 5.0 V  
1 x 1.00 W into 4 @ 3.7 V  
1 x 350 mW into 4 @ 2.5 V  
Analog Passthrough with Volume Control  
Analog Programmable Gain Amplifier (PGA)  
 Programmable Automatic Level Control (ALC)  
 Direct Battery-powered Operation  
Battery Level Monitoring & Compensation  
Noise Gate for Noise Suppression  
Programmable Threshold & Attack/Release  
Rates  
 81% Efficiency at 800 mW  
 Phase-aligned PWM Output Reduces Idle  
 Dual MIC Inputs  
Channel Current  
Differential or Single-ended  
 Spread Spectrum Modulation  
 Low Quiescent Current  
+16 dB to +32 dB w/ 1dB step MIC Pre-  
Amplifiers  
Programmable, Low-noise MIC Bias Levels  
Stereo Headphone Amplifier  
 Digital Signal Processing Engine  
 Ground-centered Outputs  
Bass & Treble Tone Control, De-emphasis  
No DC-Blocking Capacitors Required  
Master Vol. and Independent PCM SDIN + ADC  
SDOUT Mix Volume Control  
Integrated Negative Voltage Regulator  
 High-power Output at -75 dB THD+N  
Soft-ramp & Zero-Cross Transitions  
Programmable Peak-detect and Limiter  
Beep Generator w/Full Tone Control  
2 x 23 mW Into 16 @ 1.8 V  
2 x 44 mW Into 16 @ 2.5 V  
(Features continued on page 2)  
+1.65 V to +2.63 V  
+1.65 V to +2.63 V  
+1.60 V to +5.25 V  
Analog Supply  
Digital Supply  
Battery  
Summing  
Programmable  
Gain Amps  
Battery Level Monitoring & Compensation  
Stereo/Mono  
Full-Bridge  
Speaker  
+
-
Pulse-Width  
Modulator  
(PWM)  
+
-
Σ
Σ
Outputs  
ALC  
Beep  
Class D Amps  
1
2
3
Left  
Inputs  
Left HP/Line  
Output  
Mono mix,  
Limiter, Bass,  
Treble Adjust  
Multi-bit  
4
Volume, Mono  
Swap, Mix  
∆Σ ADC  
1
2
3
Multi-bit  
Right  
Inputs  
Ground-Centered  
Amps  
∆Σ DAC  
4
Right HP/Line  
Output  
HPF  
ALC  
Speaker/HP  
Switch  
+16 to +32 dB Diff./  
S.E. MIC Pre-Amps  
Control Port  
Serial Audio Port  
Level Shifter  
-VHP  
+VHP  
MIC Bias  
+1.65 V to +2.63 V  
Charge Pump  
Headphone Supply  
+1.65 V to +2.63 V  
Selectable  
Bias Voltage  
+1.65 V to +3.47 V  
Interface Supply  
Serial Audio  
Input/Output  
I2C Control  
Analog Supply  
Reset  
Copyright © Cirrus Logic, Inc. 2008  
MAY '08  
DS680F1  
(All Rights Reserved)  
http://www.cirrus.com  

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