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CS42L51-DNZ

更新时间: 2024-02-10 04:21:22
品牌 Logo 应用领域
凌云 - CIRRUS 解码器编解码器消费电路商用集成电路放大器
页数 文件大小 规格书
83页 1355K
描述
Low Power, Stereo CODEC with Headphone Amp

CS42L51-DNZ 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN, LCC32,.2SQ,20针数:32
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.04Is Samacsys:N
其他特性:ALSO OPERATE WITH 2.37V TO 2.63V SUPPLY商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:S-XQCC-N32JESD-609代码:e3
长度:5 mm湿度敏感等级:3
功能数量:1端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC32,.2SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:1.8/2.5 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Other Consumer ICs
最大供电电压 (Vsup):1.89 V最小供电电压 (Vsup):1.65 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:5 mm
Base Number Matches:1

CS42L51-DNZ 数据手册

 浏览型号CS42L51-DNZ的Datasheet PDF文件第2页浏览型号CS42L51-DNZ的Datasheet PDF文件第3页浏览型号CS42L51-DNZ的Datasheet PDF文件第4页浏览型号CS42L51-DNZ的Datasheet PDF文件第5页浏览型号CS42L51-DNZ的Datasheet PDF文件第6页浏览型号CS42L51-DNZ的Datasheet PDF文件第7页 
CS42L51  
Low Power, Stereo CODEC with Headphone Amp  
DIGITAL to ANALOG FEATURES  
ANALOG to DIGITAL FEATURES  
! 98 dB Dynamic Range (A-wtd)  
! -86 dB THD+N  
! 98 dB Dynamic Range (A-wtd)  
-88 dB THD+N  
! Analog Gain Controls  
!
! Headphone Amplifier - GND Centered  
On-Chip Charge Pump Provides -VA_HP  
No DC-Blocking Capacitor Required  
46 mW Power Into Stereo 16 @ 1.8 V  
88 mW Power Into Stereo 16 @ 2.5 V  
-75 dB THD+N  
+32 dB or +16 dB MIC Pre-Amplifiers  
Analog Programmable Gain Amplifier  
(PGA)  
! +20 dB Digital Boost  
! Programmable Automatic Level Control (ALC)  
! Digital Signal Processing Engine  
Noise Gate for Noise Suppression  
Programmable Threshold and  
Attack/Release Rates  
Bass & Treble Tone Control, De-Emphasis  
PCM + ADC Mix w/Independent Vol Control  
Master Digital Volume Control  
! Independent Channel Control  
! Digital Volume Control  
Soft Ramp & Zero Cross Transitions  
!
Beep Generator  
! High-Pass Filter Disable for DC Measurements  
! Stereo 3:1 Analog Input MUX  
! Dual MIC Inputs  
Tone Selections Across Two Octaves  
Separate Volume Control  
Programmable On & Off Time Intervals  
Programmable, Low Noise MIC Bias Levels  
Differential MIC Mix for Common Mode  
Noise Rejection  
Continuous, Periodic or One-Shot Beep  
Selections  
! Programmable Peak-Detect and Limiter  
! Pop and Click Suppression  
! Very Low 64 Fs Oversampling Clock Reduces  
Power Consumption  
1.8 V to 3.3 V  
1.8 V to 2.5 V  
1.8 V to 2.5 V  
1.8 V to 2.5 V  
MUX  
MUX  
Headphone  
Amp - GND  
Centered  
Switched  
Capacitor DAC  
and Filter  
Left HP Out  
Digital  
Signal  
Processing  
Engine  
Serial Audio  
Input  
Beep  
Generator  
Multibit  
∆Σ Modulator  
Headphone  
Amp - GND  
Centered  
Switched  
Capacitor DAC  
and Filter  
Right HP Out  
Hardware  
Mode or I2C &  
SPI Software  
Mode  
Charge  
Pump  
Control Data  
ALC  
Reset  
Stereo Input 1  
Stereo Input 2  
Multibit  
Oversampling  
ADC  
MUX  
MUX  
PGA  
PGA  
+32 dB  
Volume  
Controls  
High Pass  
Filters  
MUX  
Serial Audio  
Output  
Stereo Input 3 /  
Mic Input 1 & 2  
Multibit  
Oversampling  
ADC  
+32 dB  
MIC  
Bias  
Register  
Configuration  
ALC  
This document contains information for a new product.  
Cirrus Logic reserves the right to modify this product without notice.  
Advance Product Information  
Copyright © Cirrus Logic, Inc. 2005  
SEPTEMBER '05  
DS679A2  
(All Rights Reserved)  
http://www.cirrus.com  

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