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CP705-2N4033-CG PDF预览

CP705-2N4033-CG

更新时间: 2024-09-30 14:48:35
品牌 Logo 应用领域
CENTRAL /
页数 文件大小 规格书
2页 208K
描述
Transistor

CP705-2N4033-CG 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:compliant风险等级:5.61
Base Number Matches:1

CP705-2N4033-CG 数据手册

 浏览型号CP705-2N4033-CG的Datasheet PDF文件第2页 
TM  
PROCESS CP705  
Small Signal Transistor  
PNP - High Current Transistor Chip  
Central  
Semiconductor Corp.  
PROCESS DETAILS  
Process  
EPITAXIAL PLANAR  
Die Size  
Die Thickness  
31 x 31 MILS  
9.0 MILS  
Base Bonding Pad Area  
Emitter Bonding Pad Area  
Top Side Metalization  
Back Side Metalization  
5.9 x 11.8 MILS  
6.5 x 13.8 MILS  
Al - 30,000Å  
Au - 18,000Å  
GEOMETRY  
GROSS DIE PER 4 INCH WAFER  
11,300  
PRINCIPAL DEVICE TYPES  
2N4033  
CMPT4033  
CXT4033  
CZT4033  
BACKSIDE COLLECTOR  
145 Adams Avenue  
Hauppauge, NY 11788 USA  
Tel: (631) 435-1110  
Fax: (631) 435-1824  
www.centralsemi.com  
R2 (1-August 2002)  

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