Datasheet > CP3CN23

CP3CN23

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
246页	3536K
描述
CP3CN23 Reprogrammable Connectivity Processor with Dual CAN Interfaces

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CP3CN23 数据手册

Table 2 CP3CN23 LQFP-128 Signal Descriptions

Alternate

Primary Function

Name Pins

I/O

Alternate Function

Name

Input

12 MHz Oscillator Input

BBCLK

None

BB reference clock for the RF Interface

X1CKI

X1CKO

X2CKI

Output 12 MHz Oscillator Output

Input 32 kHz Oscillator Input

Output 32 kHz Oscillator Output

None

X2CKO

RESET

Input

I/O

Chip general reset

Special mode select input with

internal pull-up during reset

PLLCLK

CPUCLK

PLL Clock Output

CPU Clock Output

ENV0

ENV1

ENV2

TMS

TCK

Special mode select input with

internal pull-up during reset

I/O

Special mode select input with

internal pull-up during reset

I/O

SLOWCLK Slow Clock Output

JTAG Test Mode Select

(with internal weak pull-up)

Input

None

JTAG Test Clock Input

(with internal weak pull-up)

JTAG Test Data Input

(with internal weak pull-up)

TDI

Output JTAG Test Data Output

Output NEXUS Ready Output

None

TDO

RDY

2.5V Core Logic

Input

None

VCC

Power Supply

Input

I/O

Core Ground

None

TSX+

TSY+

TSX-

TSY-

None

GND

IOVCC

IOGND

AVCC

AGND

ADVCC

ADGND

SCL

2.5–3.3V I/O Power Supply

I/O Ground

None

PLL Analog Power Supply

PLL Analog Ground

ADC Analog Power Supply

ADC Analog Ground

ACCESS.bus Clock

ACCESS.bus Serial Data

ADC Input Channel 0

ADC Input Channel 1

ADC Input Channel 2

ADC Input Channel 3

ADC Input Channel 4

ADC Input Channel 5

ADC Input Channel 6

ADC Input Channel 7

None

I/O

None

SDA

I/O

Touchscreen X+ contact

Touchscreen Y+ contact

Touchscreen X- contact

Touchscreen Y- contact

ADC0

ADC1

ADC2

ADC3

ADC4

ADC5

ADC6

ADC7

I/O

MUXOUT0 Analog Multiplexer Output 0

MUXOUT1 Analog Multiplexer Output 1

I/O

Input

None

ADCIN

ADC Input (in MUX mode)

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