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CP3CN23

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
246页 3536K
描述
CP3CN23 Reprogrammable Connectivity Processor with Dual CAN Interfaces

CP3CN23 数据手册

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FINAL  
JULY 2004  
CP3CN23 Reprogrammable Connectivity Processor with  
Dual CAN Interfaces  
1.0 General Description  
The CP3CN23 connectivity processor combines high per- trade-off between battery size and operating time for hand-  
formance with the massive integration needed for embed- held and portable applications.  
ded applications. A powerful RISC core with on-chip SRAM  
In addition to providing the features needed for the next gen-  
and Flash memory provides high computing bandwidth,  
eration of embedded products, the CP3CN23 is backed up  
hardware communications peripherals provide high-I/O  
by the software resources designers need for rapid time-to-  
bandwidth, and an external bus provides system expand-  
market, including an operating system, peripheral drivers,  
ability.  
reference designs, and an integrated development environ-  
On-chip communications peripherals include: dual CAN ment.  
controllers, Microwire/Plus, SPI, ACCESS.bus, quad UART,  
National Semiconductor offers a complete and industry-  
12-bit A/D converter, and Advanced Audio Interface (AAI).  
proven application development environment for CP3CN23  
Additional on-chip peripherals include Random Number  
applications, including the IAR Embedded Workbench,  
Generator (RNG), DMA controller, CVSD/PCM conversion  
iSYSTEM winIDEA and iC3000 Active Emulator, and Appli-  
module, Timing and Watchdog Unit, Versatile Timer Unit,  
cation Software.  
Multi-Function Timer, and Multi-Input Wake-Up (MIWU)  
unit.  
Hand-held devices can be both smaller and lower in cost for  
maximum consumer appeal. The low voltage and advanced  
power-saving modes achieve new design points in the  
Block Diagram  
Clock Generator  
12 MHz and 32 kHz  
Oscillator  
PLL and Clock  
Generator  
Power-on-Reset  
256K Bytes  
Flash  
Program  
Memory  
Serial  
Debug  
Interface  
8K Bytes  
Flash  
Data  
32K Bytes  
Static  
RAM  
Dual  
CAN 2.0B  
Controller  
CR16C  
CPU Core  
CPU Core Bus  
Random  
Number  
Generator  
Timing and  
Watchdog  
Unit  
Interrupt  
Control  
Unit  
Power  
Manage-  
ment  
Peripheral  
Bus  
Controller  
Bus  
Interface  
Unit  
DMA  
Controller  
CVSD/PCM  
Converter  
Peripheral Bus  
ACCESS  
.bus  
Audio  
Interface  
Microwiire/  
SPI  
Versatile  
Timer Unit  
Muti-Func-  
tion Timer  
Multi-Input  
Wake-Up  
8-Channel  
12-bit ADC  
GPIO  
Quad UART  
DS310  
TRI-STATE is a registered trademark of National Semiconductor Corporation.  
©2004 National Semiconductor Corporation  
www.national.com  

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