July 1999
COP8FG Family
8-Bit CMOS ROM Based and OTP Microcontrollers with
8k to 32k Memory, Two Comparators and USART
Erasable windowed versions are available for use with a
General Description
range of COP8 software and hardware development tools.
Note: COP8FG devices are 15 MHz versions of the
Family features include an 8-bit memory mapped architec-
COP8SG devices.
ture, 15 MHz CKI with 0.67 µs instruction cycle, 14 inter-
The COP8FGx5 Family ROM based microcontrollers are
rupts, three multi-function 16-bit timer/counters with PWM,
™
highly integrated COP8 Feature core devices with 8k to
™
full duplex USART, MICROWIRE/PLUS , two analog com-
32k memory and advanced features including Analog com-
parators, and zero external components. These single-chip
CMOS devices are suited for more complex applications re-
quiring a full featured controller with larger memory, low EMI,
two comparators, and a full-duplex USART. COP8FGx7 de-
vices are 100% form-fit-function compatible 8k or 32k OTP
(One Time Programmable) versions for use in production or
development.
parators, two power saving HALT/IDLE modes, MIWU, idle
timer, on-chip R/C oscillator, high current outputs, user se-
™
lectable options (WATCHDOG , 4 clock/oscillator modes,
power-on-reset), 4.5V to 5.5V operation, program code se-
curity, and 28/40/44 pin packages.
Devices included in this datasheet are:
RAM
Device
Memory (bytes)
I/O Pins
Packages
Temperature
(bytes)
256
COP8FGE5
COP8FGG5
COP8FGH5
COP8FGK5
COP8FGR5
COP8FGE7
COP8FGR7
COP8FGR7-Q3
8k ROM
16k ROM
24/36/40
24/36/40
24/36/40
24/36/40
24/36/40
24/36/40
24/36/40
24/36/40
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
-40 to +85˚C
-40 to +85˚C
-40 to +85˚C
-40 to +85˚C
-40 to +85˚C
-40 to +85˚C
-40 to +85˚C
Room Temp.
512
20k ROM
512
24k ROM
512
32k ROM
512
8k OTP EPROM
32k OTP EPROM
32k EPROM
256
512
512
— Software Trap
Key Features
— USART (2; 1 receive and 1 transmit)
— Default VIS (default interrupt)
n 8-bit Stack Pointer SP (stack in RAM)
n Two 8-bit Register Indirect Data Memory Pointers
n True bit manipulation
n Low cost 8-bit microcontroller
n Quiet Design (low radiated emissions)
n Multi-Input Wakeup pins with optional interrupts (8 pins)
n Mask selectable clock options
— Crystal oscillator
— Crystal oscillator option with on-chip bias resistor
— External oscillator
n BCD arithmetic instructions
Peripheral Features
n Multi-Input Wakeup Logic
n Three 16-bit timers (T1 — T3), each with two 16-bit
registers supporting:
— Internal R/C oscillator
n Internal Power-On-Reset — user selectable
n WATCHDOG and Clock Monitor Logic — user selectable
n Eight high current outputs
— Processor Independent PWM mode
— External Event Counter mode
— Input Capture mode
n 256 or 512 bytes on-board RAM
n 8k to 32k ROM or OTP EPROM with security feature
n Idle Timer (T0)
n MICROWIRE/PLUS Serial Interface (SPI Compatible)
n Full Duplex USART
CPU Features
n Versatile easy to use instruction set
n 0.67 µs instruction cycle time
n Two Analog Comparators
n Fourteen multi-source vectored interrupts servicing
— External interrupt / Timers T0 — T3
— MICROWIRE/PLUS Serial Interface
— Multi-Input Wake Up
™
™
™
COP8 , MICROWIRE/PLUS , and WATCHDOG are trademarks of National Semiconductor Corporation.
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
iceMASTER® is a registered trademark of MetaLink Corporation.
© 1999 National Semiconductor Corporation
DS101116
www.national.com