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CM8888-2 PDF预览

CM8888-2

更新时间： 2024-01-27 00:26:19
品牌 Logo 应用领域
CALMIRCO /
页数 文件大小 规格书
13页 322K
描述
CMOS INTEGRATED DTMF TRANCEIVER

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CM8888-2 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.82Is Samacsys：N
JESD-30 代码：R-PDSO-G20长度：12.905 mm
功能数量：1端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
认证状态：Not Qualified座面最大高度：2.85 mm
最大压摆率：10 mA标称供电电压：5 V
表面贴装：YES技术：CMOS
电信集成电路类型：DTMF SIGNALING CIRCUIT温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL宽度：7.635 mm
Base Number Matches：1

CM8888-2 数据手册

 浏览型号CM8888-2的Datasheet PDF文件第3页浏览型号CM8888-2的Datasheet PDF文件第4页浏览型号CM8888-2的Datasheet PDF文件第5页浏览型号CM8888-2的Datasheet PDF文件第7页浏览型号CM8888-2的Datasheet PDF文件第8页浏览型号CM8888-2的Datasheet PDF文件第9页 
CALIFORNIA MICRO DEVICES  
CM8888/8888-2  
Explanation Of Events  
RX -RX3 4-bit decoded data in receive data register.  
A.  
B.  
C.  
Tone bursts detected, tone duration invalid RX  
data register not updated.  
Tone #n detected, tone duration valid, tone  
decoded and latched in RX data register.  
End of tone #n detected, tone absent duration  
valid, information in RX data register retained  
until next valid tone pair.  
b30  
Delayed steering. Indicates that valid  
freqeuncies have been present/absent for  
the required guard time thus consituting a  
valid siganal.  
Indicates that valid data is in the receive  
data register. The bit is cleared after the  
status register is read.  
b2  
D.  
E.  
Tone #n + 1 detected, tone duration valid, tone  
decoded and latched in RX data register.  
Acceptance dropout of tone #n + 1, tone  
absent duration invalid, data remains  
unchanged.  
End of tone #n + 1 detected, tone absent  
duration valid, inforamtion in RX data register  
retained until next valid tone repair.  
IRQ/CP Interupt is active indicating that new data  
is in the RX data register. The interupt is  
cleared after the status register is read.  
tREC  
tREC  
tID  
Maximum DTMF signal duration not  
detected as valid.  
Minimum DTMF signal duration required  
for valid recognition.  
Minimum time between valid sequencial  
DTMF signals.  
F.  
Explanation  
Symbols  
tDO  
Maximum allowable dropout during valid  
DTMF signal.  
Time to detect valid frequencies present.  
Time to detect valid frequencies absent.  
Guard time, tone present.  
VIN  
ESt  
DTMF composite input signal.  
Early steering output, Indicates detection  
of valid tone frequencies.  
tDP  
tDA  
tGTP  
tGTA  
St/GT Steering input/guard time output. Drives  
external RC timing circuit.  
Guard time, tone absent.  
Functional  
Description  
Input  
Configuration  
The CM8888 Integrated DTMF Transceiver provides the design  
engineer with not only low power consumption, but central  
office quality performance. The CM8888’s internal architecture  
consists of high performance DTMF receiver with an internal  
Gain Setting Amplifier and DTMF gernerator. The DTMF  
Generator contains a Tone Burst Counter for generating precise  
tone bursts and pauses. The Call Progress mode, when  
selected, allows the detection of call progress tones. A  
standard 8051, 8086/8 series microprocessor interface allows  
access to an internal status register, two control registers and  
two data registers within the CM8888.  
The CM8888 input arrangement consists of a differential input  
operational amplifier and bias sources (VREF) for biasing the  
amplifier inputs at VDD/2. Provisions are made for the  
connection of a feedback resistor to the op amp output (GS) for  
gain adjustment. In the single-ended configuration, the input  
pins should be connected as shown in Figure 1, while Figure 2  
shows the necessary connections for a differential input  
configuration.  
©2000 California Micro Devices Corp. All rights reserved.  
5/00  
215 Topaz Street, Milpitas, California 95035  
Tel: (408) 263-3214  
Fax: (408) 263-7846  
www.calmicro.com  
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