Datasheet > CM6631A

CM6631A

更新时间： 2024-11-30 01:24:39

品牌	Logo	应用领域
骅讯 - CMEDIA		/
页数	文件大小	规格书
16页	499K
描述
USB 2.0 High-Speed True HD Audio Processor

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中文翻译

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数据手册

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CM6631A 数据手册

CM6631A

USB 2.0 High-Speed True HD Audio Processor

DESCRIPTION

FEATURES

Cmedia CM6631A is a USB2.0 true high-speed audio

processor that can support the latest USB Audio

Device Class Definition V2.0 and high-definition

audio processing capability up to 192KHz/32bit.

CM6631A provides the industrial standard I2S and

HDA audio interface and also integrates



USB Spec. Rev.2.0 high-speed/full-speed mode

compatible

Latest USB Audio Device Class Definition Release

v.2.0/1.0 compatible

USB Human Interface Device (HID) Class

Definition Release 1.1 compliant

Supports USB suspend/resume/reset functions

Supports control, interrupt, bulk, and

isochronous data transfers

192KHz/24bit S/PDIF transmitter/receiver and

MIDI I/O device. It’s suitable for versatile,

high-profile, typical 2-channel I/O audio



applications. Furthermore, CM6631A has an

embedded 8051 microprocessor that can enhance

the best flexibility and functionality with external

upgradeable F/W codes. CM6631A would be the

most high-fidelity and powerful audio core for

high-value USB2.0 audio products.



2 pairs I2S or Left-Justified serial audio output

/input interface

I2S input/output support

192K/176.4K/96K/88.2K/48K/44.1KHz and

16/24/32-bit



Built-in 192K/176.4K/96K/88.2K/48K/44.1KHz

and 16/24-bit S/PDIF transceiver

Supports S/PDIF IN-to-OUT loop-back path for

signal transforming between TOSLINK and RCA

connections

BLOCK DIAGRAM

GPIO/JD

PDSW

Self-Power

Parallel

Master I2C

Interface

Slave I2C

EEPROM/Flash

Interface

GPIO Interface

Bus-Power

3.3V-to-2.5V

Regulator

MIDI

I/O

Port

Local Address Data Bus

Interrupt

Processor

Power-On

Reset

Control

Processor

8051 Processor

Command Bus

USB2.0

Transceiver

Interface

(UTMI)

S/PDIF Out

USB D+/D-

FIFO

Data Bus

2CH I2S/HDA-

Out

PDMA_B (SPO)

2CH

I2S/HDA-Out

Controller

USB

Core

Logic

PDMA_C (2CH)

PDMA_A (2CH)

2CH I2S/

HDA-In

12MHz

Controller

PLL

Clock-

Generator

2CH

I2S/HDA-In

Controller

RDMA_A (2CH)

RDMA_B (2CH)

RDMA_C (SPI)

Optional

45.158M

and

S/PDIF IN

49.152MHz

www.cmedia.com.tw

Rev. 1.0︱ Page 1/16

12 3 4 5 6 7...16

中文翻译

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