Datasheet > CL7128AETC144-4

CL7128AETC144-4

更新时间： 2024-11-24 23:42:11

品牌	Logo	应用领域
其他 - ETC		可编程逻辑器件
页数	文件大小	规格书
14页	162K
描述
Electrically-Erasable Complex PLD

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中文翻译

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数据手册

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CL7128AETC144-4 数据手册

CL7128A

CL7128AE

Laser Processed Logic Device Family

u Laser Processed Logic Device (LPLD) technology offers

the ultimate combination of performance, flexibility, and

low cost

u Functionally, architecturally, and electrically compatible

with industry-standard Altera^®MAX^®7000

u High Density

2,500 Usable gates

128 Macrocells

100 Maximum user I/O pins

u Laser fuse technology provides very fast, dense

interconnect routing

u Low current consumption

u Supports 3.3 volt operation

u Alpha particle immune

CL7000 Product Family Overview

CL7128A

CL7128AE

CL7256A

CL7256AE

5,000

Feature

CL7512A

Useable Gates

Macrocells

2,500

10,000

512

128

256

Logic array Blocks

Max user I/O pins

Speed Grades

100

164

212

-4, -5, -6, -7, -10, -12

-6, -7, -10, -12

84-Pin PLCC

100-Pin TQFP

100-Pin BGA

144-Pin TQFP

208-Pin PQFP

Packages

100-Pin BGA

144-Pin TQFP

256-Pin BGA

208-Pin PQFP

256-Pin BGA

7KA tbl 01A

December 2000

Page 1

12 3 4 5 6 7...14

中文翻译

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