Datasheet > CED51A3

CED51A3

更新时间： 2024-02-24 09:30:33

品牌	Logo	应用领域
华瑞 - CET		晶体晶体管
页数	文件大小	规格书
4页	144K
描述
N-Channel Enhancement Mode Field Effect Transistor

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技术参数
数据手册

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CED51A3 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.61
Base Number Matches：	1

CED51A3 数据手册

CED51A3/CEU51A3

N-Channel Enhancement Mode Field Effect Transistor

FEATURES

30V, 35A, R_DS(ON)= 14mΩ(typ) @V_GS= 10V.

R_DS(ON)= 21mΩ(typ) @V_GS= 4.5V.

Super high dense cell design for extremely low R_DS(ON)

High power and current handing capability.

Lead free product is acquired.

TO-251 & TO-252 package.

CEU SERIES

TO-252(D-PAK)

CED SERIES

TO-251(I-PAK)

ABSOLUTE MAXIMUM RATINGS T = 25 C unless otherwise noted

Parameter

Symbol

V_DS

V_GS

I_D

Limit

Units

Drain-Source Voltage

Gate-Source Voltage

±20

Drain Current-Continuous

Drain Current-Pulsed ^a

I_DM

140

Maximum Power Dissipation @ T_C= 25 C

- Derate above 25 C

P_D

0.33

-55 to 175

W/ C

Operating and Store Temperature Range

TJ,Tstg

Thermal Characteristics

Parameter

Symbol

RθJC

Limit

Units

C/W

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient

RθJA

2004.October

http://www.cetsemi.com

6 - 70

12 3 4

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