Datasheet > CED540A

CED540A

更新时间： 2024-01-06 20:49:49

品牌	Logo	应用领域
华瑞 - CET		晶体晶体管
页数	文件大小	规格书
4页	172K
描述
N-Channel Enhancement Mode Field Effect Transistor

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技术参数
数据手册

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CED540A 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.61
Is Samacsys：	N	Base Number Matches：	1

CED540A 数据手册

CED540A/CEU540A

N-Channel Enhancement Mode Field Effect Transistor

FEATURES

100V, 25A, R_DS(ON)= 49mΩ @V_GS= 10V.

Super high dense cell design for extremely low R_DS(ON)

High power and current handing capability.

Lead free product is acquired.

TO-251 & TO-252 package.

CEU SERIES

TO-252(D-PAK)

CED SERIES

TO-251(I-PAK)

ABSOLUTE MAXIMUM RATINGS T = 25 C unless otherwise noted

Parameter

Symbol

V_DS

V_GS

I_D

Limit

Units

Drain-Source Voltage

100

Gate-Source Voltage

±20

Drain Current-Continuous

Drain Current-Pulsed ^a

I_DM

100

Maximum Power Dissipation @ T_C= 25 C

- Derate above 25 C

P_D

0.45

W/ C

Operating and Store Temperature Range

TJ,Tstg

-55 to 175

Thermal Characteristics

Parameter

Symbol

RθJC

Limit

2.2

Units

C/W

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient

RθJA

Rev .1 2006.March

Specification and data are subject to change without notice .

http://www.cetsemi.com

6 - 74

12 3 4

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