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CDP68HSC05C4D PDF预览

CDP68HSC05C4D

更新时间： 2024-11-30 20:18:27
品牌 Logo 应用领域
瑞萨 - RENESAS 时钟微控制器外围集成电路装置
页数 文件大小 规格书
51页 338K
描述
IC,MICROCONTROLLER,8-BIT,6805 CPU,CMOS,DIP,40PIN,CERAMIC

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CDP68HSC05C4D 技术参数

生命周期：Transferred包装说明：DIP, DIP40,.6
Reach Compliance Code：compliant风险等级：5.76
Is Samacsys：N位大小：8
CPU系列：6805JESD-30 代码：R-XDIP-T40
端子数量：40最高工作温度：70 °C
最低工作温度：封装主体材料：CERAMIC
封装代码：DIP封装等效代码：DIP40,.6
封装形状：RECTANGULAR封装形式：IN-LINE
电源：3.3/5 V认证状态：Not Qualified
RAM（字节）：176ROM（单词）：4160
ROM可编程性：MROM速度：4 MHz
子类别：Microcontrollers最大压摆率：13.3 mA
表面贴装：NO技术：CMOS
温度等级：COMMERCIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
Base Number Matches：1

CDP68HSC05C4D 数据手册

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CDP68HC05C4, CDP68HC05C8,  
CDP68HCL05C4, CDP68HCL05C8,  
CDP68HSC05C4, CDP68HSC05C8  
Semiconductor  
October 1995  
8-Bit Microcontroller Series  
The following are some of the hardware and software  
highlights of the CDP68HC05C4 family of HCMOS Micro-  
computers.  
Hardware Features (All Types)  
• HCMOS Technology  
Software Features  
• Similar to MC6800  
• 8-Bit Architecture  
• 8 x 8 Unsigned Multiply Instruction  
• Efficient Use of Program Space  
• Versatile Interrupt Handling  
• True Bit Manipulation  
• Power-Saving STOP, WAIT and Data Retention Modes  
• Fully Static Operation  
• On-Chip Memory  
- CDP68HC05C4, CDP68HCL05C4, CDP68HSC05C4  
- 176 Bytes of RAM  
- 4160 Bytes of User ROM  
• Addressing Modes with Indexed Addressing for Table  
• Efficient Instruction Set  
• Memory Mapped I/O  
- CDP68HC05C8, CDP68HCL05C8, CDP68HSC05C8  
- 176 Bytes of RAM  
- 7744 Bytes of User ROM  
• Two Power-Saving Standby Modes  
• Upward Software Compatible with the CDP6805  
CMOS Family  
• 24 Bidirectional I/O Lines and 7 Input-Only Lines  
• Internal 16-Bit Timer  
Description  
• Serial Communications Interface (SCI) System  
• Serial Peripheral Interface (SPI) System  
• Self-Check Mode  
The CDP68HC05C4 HCMOS Microcomputer is a member of  
the CDP68HC05 family of low-cost single chip microcomput-  
ers. This 8-bit microcomputer unit (MCU) contains an on-  
chip oscillator, CPU, 176 bytes of RAM, 4160 bytes of user  
ROM, I/O, two serial interface systems, and timer. The fully  
static design allows operation at frequencies down to DC,  
further reducing its already low-power consumption.  
• External, Timer, SCI, and SPI Interrupts  
• Master Reset and Power-On Reset  
• On-Chip Oscillator with RC or Crystal Mask Options  
The CDP68HC05C8 is similar to the CDP68HC05C4 except  
for the size of on-chip ROM. The CDP68HC05C8 has 7744  
bytes of on-chip user ROM. All information pertaining to the  
CDP68HC05C4 MCU applies to the CDP68HC05C8 with  
the exception of the memory description.  
• 40 Lead Dual-In-Line, 44 Lead† Plastic Chip Carrier,  
and 44 Lead Metric Plastic Quad Flatpack Packages  
• CDP68HC05C4, CDP68HC05C8  
- 4.2MHz Operating Frequency (2.1MHz Internal Bus  
Frequency) at 5V; 2.0MHz (1.0MHz Internal Bus) at  
3.0V  
The CDP68HCL05C4 and CDP68HCL05C8 MCU devices  
are low-power versions of the CDP68HC05C4 and  
CDP68HC05C8, respectively. They contain all the features  
of the CDP68HC05C4 and CDP68HC05C8 with additional  
features of lower power consumption in the RUN, WAIT and  
STOP modes; and low voltage operation down to 2.4V.  
- Single 3.0V to 6.0V Supply (2.0V Data Retention  
Mode)  
• CDP68HCL05C4, CDP68HCL05C8  
- Lower Supply Current, IDD in RUN, WAIT and STOP  
Modes at 5.5V, 3.6V and 2.4V  
The CDP68HSC05C4 and CDP68HSC05C8 MCU devices  
are high-speed versions of the CDP68HC05C4 and  
CDP68HC05C8, respectively. They also contain all the fea-  
tures of the CDP68HC05C4 and CDP68HC05C8 with the  
additional capability of higher frequency operation at  
8.0MHz.  
- Single 2.4V to 6.0V Supply (2V Data Retention  
Mode)  
• CDP68HSC05C4, CDP68HSC05C8  
- 8.0MHz Operating Frequency (4.0MHz Internal Bus  
Frequency)  
† Pin number references throughout this specification refer to the 40  
lead DIP. See pinouts for cross reference.  
• Single 3.0V to 6.0V Supply (2.0V Data Retention Mode)  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.  
File Number 2748.3  
Copyright © Harris Corporation 1995  
2-3  
1234567...51

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