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CDP1854AC3 PDF预览

CDP1854AC3

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
12页 126K
描述
High Reliability CMOS Programmable Universal Asynchronous Receiver/Transmitter (UART)

CDP1854AC3 数据手册

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CDP1854A/3, CDP1854AC/3  
Dynamic Electrical Specifications t , t = 15ns, V = V , V = V , C = 100pF, (See Figure 4)  
R
F
IH  
DD IL  
SS  
L
LIMITS  
o
o
o
-55 C, +25 C  
+125 C  
V
DD  
PARAMETER  
(V)  
MIN  
MAX  
MIN  
MAX  
UNITS  
CPU INTERFACE - READ TIMING - MODE 1  
Pulse Width  
TPB  
t
5
125  
70  
-
-
165  
80  
-
-
ns  
ns  
TT  
10  
Setup Time  
RSEL to TPB  
t
t
5
15  
20  
-
-
0
-
-
ns  
ns  
RST  
TRS  
RDV  
10  
10  
Hold Time  
RSEL after TPB  
5
-10  
5
-
-
-25  
0
-
-
ns  
ns  
10  
Propagation Delay Time  
Read to Data Valid Time  
t
5
10  
5
-
-
-
-
360  
165  
250  
125  
-
-
-
-
420  
195  
295  
145  
ns  
ns  
ns  
ns  
RESEL to Data Valid Time  
t
RSDV  
10  
t
TT  
TPB  
t
TRS  
t
RST  
RSEL  
t
RSDV  
R BUS 0-  
R BUS 7  
t
RDV  
RD/WR, CS1, CS3  
(NOTE 1)  
CS2  
NOTE:  
1. Read is the overlap of CS1, CS3, RD/WR = 1 and CS2 = 0.  
FIGURE 4. MODE 1 CPU INTERFACE (READ) TIMING DIAGRAM  
7

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