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CDB42518 PDF预览

CDB42518

更新时间: 2022-11-24 21:47:03
品牌 Logo 应用领域
凌云 - CIRRUS 解码器编解码器光电二极管
页数 文件大小 规格书
91页 1556K
描述
110 dB, 192 kHz 8-Ch Codec with S/PDIF Receiver

CDB42518 数据手册

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CS42518  
110 dB, 192 kHz 8-Ch Codec with S/PDIF Receiver  
Features  
General Description  
The CS42518 codec provides two analog-to-digital and eight  
digital-to-analog delta-sigma converters, as well as an integrat-  
ed S/PDIF receiver, in a 64-pin LQFP package.  
z Eight 24-bit D/A, two 24-bit A/D Converters  
z 110 dB DAC / 114 dB ADC Dynamic Range  
z -100 dB THD+N  
The CS42518 integrated S/PDIF receiver supports up to eight  
inputs, clock recovery circuitry and format auto-detection. The  
internal stereo ADC is capable of independent channel gain  
control for single-ended or differential analog inputs. All eight  
channels of DAC provide digital volume control and differential  
analog outputs. The general purpose outputs may be driven  
high or low, or mapped to a variety of DAC mute controls or  
ADC overflow indicators.  
z System Sampling Rates up to 192 kHz  
z S/PDIF Receiver Compatible with EIAJ CP1201  
and IEC-60958  
z Recovered S/PDIF Clock or System Clock  
Selection  
z 8:2 S/PDIF Input MUX  
z ADC High-pass Filter for DC Offset Calibration  
The CS42518 is ideal for audio systems requiring wide dynam-  
ic range, negligible distortion and low noise, such as A/V  
receivers, DVD receivers, digital speaker and automotive audio  
systems.  
z Expandable ADC Channels and One-line Mode  
Support  
z Digital Output Volume Control with Soft Ramp  
z Digital +/-15dB Input Gain Adjust for ADC  
z Differential Analog Architecture  
ORDERING INFORMATION  
CS42518-CQZ -10° to 70° C 64-pin LQFP  
CS42518-DQZ -40° to 85° C 64-pin LQFP  
Lead Free  
Lead Free  
z Supports logic levels between 5 V and 1.8 V.  
CDB42518  
Evaluation Board  
VARX AGND  
TXP  
LPFLT  
DGND DGND  
VD  
VD  
RXP0  
RXP1/GPO1  
RXP2/GPO2  
RXP3/GPO3  
RXP4/GPO4  
RXP5/GPO5  
RXP6/GPO6  
RXP7/GPO7  
INT  
RST  
C&U Bit  
Data Buffer  
Control  
Port  
AD0/CS  
S/PDIF  
Decoder  
Clock/Data  
Recovery  
Rx  
AD1/CDIN  
SDA/CDOUT  
SCL/CCLK  
Format  
Detector  
VLC  
GPO  
OMCK  
MUTEC  
MUTE  
Mult/Div  
RMCK  
Internal MCLK  
FILT+  
VQ  
Serial  
Audio  
Interface  
Port  
SAI_LRCK  
SAI_SCLK  
SAI_SDOUT  
Ref  
DEM  
REFGND  
VA  
AGND  
VLS  
AINL+  
AINL-  
ADC#1  
ADC#2  
Digital Filter  
Digital Filter  
Gain & Clip  
Gain & Clip  
ADC  
Serial  
Data  
ADCIN1  
ADCIN2  
AINR+  
AINR-  
CX_SDOUT  
CX_LRCK  
CX_SCLK  
AOUTA1+  
AOUTA1-  
DAC#1  
AOUTB1+  
AOUTB1-  
CX_SDIN1  
CX_SDIN2  
CX_SDIN3  
CX_SDIN4  
DAC#2  
DAC#3  
AOUTA2+  
AOUTA2-  
CODEC  
Serial  
Port  
AOUTB2+  
AOUTB2-  
DAC#4  
DAC#5  
AOUTA3+  
AOUTA3-  
AOUTB3+  
AOUTB3-  
DAC#6  
DAC#7  
AOUTA4+  
AOUTA4-  
AOUTB4+  
AOUTB4-  
DAC#8  
This document contains information for a new product.  
Cirrus Logic reserves the right to modify this product without notice.  
Preliminary Product Information  
Cirrus Logic, Inc.  
http://www.cirrus.com  
Copyright © Cirrus Logic, Inc. 2005  
JAN ‘05  
DS584PP5  
(All Rights Reserved)  

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