CD74HC4518, CD54HC4520,
CD74HC4520, CD74HCT4520
Data sheet acquired from Harris Semiconductor
SCHS216D
High-Speed CMOS Logic
Dual Synchronous Counters
November 1997 - Revised October 2003
having interchangeable CLOCK and ENABLE lines for
incrementing on either the positive-going or the negative-
going transition of CLOCK. The counters are cleared by high
levels on the MASTER RESET lines. The counter can be
Features
• Positive or Negative Edge Triggering
• Synchronous Internal Carry Propagation
[ /Title
(CD74
HC451
8,
CD74
HC452
0,
CD74
HCT45
20)
/Sub-
ject
cascaded in the ripple mode by connecting Q to the
3
• Fanout (Over Temperature Range)
ENABLE input of the subsequent counter while the CLOCK
input of the latter is held low.
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Ordering Information
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
TEMP. RANGE
o
PART NUMBER
CD54HC4520F3A
CD74HC4518E
( C)
PACKAGE
16 Ld CERDIP
16 Ld PDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
• Significant Power Reduction Compared to LSTTL
Logic ICs
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
• HC Types
- 2V to 6V Operation
CD74HC4520E
- High Noise Immunity: N = 30%, N = 30% of V
IL IH CC
CD74HC4520M
at V
= 5V
CC
CD74HC4520MT
CD74HC4520M96
CD74HCT4520E
CD74HCT4520M
CD74HCT4520MT
CD74HCT4520M96
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL IH
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
Description
The CD74HC4518 is a dual BCD up-counter. The ’HC4520
and CD74HCT4520 are dual binary up-counters. Each
device consists of two independent internally synchronous
4-stage counters. The counter stages are D-type flip-flops
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel
of 250.
Pinout
CD54HC4520
(CERDIP)
CD74HC4518
(PDIP)
CD74HC4520, CD74HCT4520,
(PDIP, SOIC)
TOP VIEW
1CP
1E
1
2
3
4
5
6
7
8
16 V
CC
15 2MR
1Q
1Q
1Q
1Q
14 2Q
13 2Q
12 2Q
11 2Q
10 2E
0
1
2
3
3
2
1
0
1MR
GND
9
2CP
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1