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CD74HCT157E PDF预览

CD74HCT157E

更新时间: 2024-11-02 23:04:31
品牌 Logo 应用领域
哈里斯 - HARRIS 复用器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 28K
描述
High Speed CMOS Logic Quad 2-Input Multiplexers

CD74HCT157E 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.62
系列:HCTJESD-30 代码:R-PDIP-T16
JESD-609代码:e0负载电容(CL):50 pF
逻辑集成电路类型:MULTIPLEXER最大I(ol):0.004 A
功能数量:4输入次数:2
输出次数:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5 VProp。Delay @ Nom-Sup:38 ns
传播延迟(tpd):46 ns认证状态:Not Qualified
子类别:Multiplexer/Demultiplexers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

CD74HCT157E 数据手册

 浏览型号CD74HCT157E的Datasheet PDF文件第2页浏览型号CD74HCT157E的Datasheet PDF文件第3页浏览型号CD74HCT157E的Datasheet PDF文件第4页浏览型号CD74HCT157E的Datasheet PDF文件第5页浏览型号CD74HCT157E的Datasheet PDF文件第6页 
CD74HC157, CD74HCT157,  
CD74HC158, CD74HCT158  
S E M I C O N D U C T O R  
High Speed CMOS Logic  
Quad 2-Input Multiplexers  
September 1997  
Features  
Description  
• Common Select Inputs  
• Separate Enable Inputs  
• Buffered inputs and Outputs  
• Fanout (Over Temperature Range)  
The Harris CD74HC157, CD74HCT157, CD74HC158 and  
CD74HCT158 are quad 2-input multiplexers which select  
four bits of data from two sources under the control of a  
common Select input (S). The Enable input (E) is active Low.  
When (E) is High, all of the outputs in the 158, the inverting  
type, (1Y-4Y) are forced High and in the 157, the non-  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
inverting type, all of the outputs (1Y-4Y) are forced Low,  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads regardless of all other input conditions.  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C Moving data from two groups of registers to four common  
output busses is a common use of these devices. The state  
of the Select input determines the particular register from  
• Balanced Propagation Delay and Transition Times  
which the data comes. They can also be used as function  
generators.  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
• HC Types  
Ordering Information  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30%of V at  
CC  
PKG.  
IL  
IH  
o
PART NUMBER TEMP. RANGE ( C) PACKAGE  
NO.  
E16.3  
E16.3  
E16.3  
E16.3  
V
= 5V  
CC  
• HCT Types  
CD74HC157E  
CD74HCT157E  
CD74HC158E  
CD74HCT158E  
CD74HC157M  
CD74HCT157M  
CD74HC158M  
NOTES:  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
16 Ld PDIP  
16 Ld PDIP  
16 Ld PDIP  
16 Ld PDIP  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
16 Ld SOIC M16.15  
16 Ld SOIC M16.15  
16 Ld SOIC M16.15  
Pinout  
CD74HC157, CD74HCT157, CD74HC158, CD74HCT158  
(PDIP, SOIC)  
TOP VIEW  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
S
1
2
3
4
5
6
7
8
16 V  
15 E  
CC  
1I  
0
1
2. Wafer or die for this part number is available which meets all elec-  
trical specifications. Please contact your local sales office or  
Harris customer service for ordering information.  
1I  
14 4I  
13 4I  
0
1
1Y  
2I  
2I  
12 4Y  
0
1
11 3I  
10 3I  
0
1
2Y  
9
3Y  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1642.2  
Copyright © Harris Corporation 1997  
1

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