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CD74HC4060PWG4 PDF预览

CD74HC4060PWG4

更新时间： 2024-11-29 05:28:03
品牌 Logo 应用领域
德州仪器 - TI 振荡器计数器
页数 文件大小 规格书
17页 449K
描述
High-Speed CMOS Logic 14-Stage Binary Counter with Oscillator

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CD74HC4060PWG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP, TSSOP16,.25针数：16
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.03其他特性：OUTPUTS FROM 10 STAGES AVAILABLE; BUILT-IN OSCILLATOR
计数方向：UP系列：HC/UH
JESD-30 代码：R-PDSO-G16JESD-609代码：e4
长度：5 mm负载电容（CL）：50 pF
负载/预设输入：NO逻辑集成电路类型：BINARY COUNTER
最大频率@ Nom-Sup：20000000 Hz最大I（ol）：0.0052 A
工作模式：ASYNCHRONOUS湿度敏感等级：1
位数：14功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TUBE峰值回流温度（摄氏度）：260
电源：2/6 V最大电源电流（ICC）：0.08 mA
Prop。Delay @ Nom-Sup：64 ns传播延迟（tpd）：450 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Counters最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：4.5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：NEGATIVE EDGE宽度：4.4 mm
最小 fmax：23 MHzBase Number Matches：1

CD74HC4060PWG4 数据手册

 浏览型号CD74HC4060PWG4的Datasheet PDF文件第2页浏览型号CD74HC4060PWG4的Datasheet PDF文件第3页浏览型号CD74HC4060PWG4的Datasheet PDF文件第4页浏览型号CD74HC4060PWG4的Datasheet PDF文件第5页浏览型号CD74HC4060PWG4的Datasheet PDF文件第6页浏览型号CD74HC4060PWG4的Datasheet PDF文件第7页 
CD54HC4060, CD74HC4060,  
CD54HCT4060, CD74HCT4060  
Data sheet acquired from Harris Semiconductor  
SCHS207G  
High-Speed CMOS Logic  
14-Stage Binary Counter with Oscillator  
February 1998 - Revised October 2003  
the negative transition of φI (and φO). All inputs and outputs  
are buffered. Schmitt trigger action on the input-pulse-line  
permits unlimited rise and fall times.  
Features  
• Onboard Oscillator  
• Common Reset  
• Negative-Edge Clocking  
[ /Title  
(CD74  
HC406  
0,  
CD74  
HCT40  
60)  
/Sub-  
ject  
(High  
Speed  
CMOS  
In order to achieve a symmetrical waveform in the oscillator  
section the HCT4060 input pulse switch points are the same  
as in the HC4060; only the MR input in the HCT4060 has  
TTL switching levels.  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Ordering Information  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
TEMP. RANGE  
o
PART NUMBER  
CD54HC4060F3A  
CD54HCT4060F3A  
CD74HC4060E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld PDIP  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
• HC Types  
- 2V to 6V Operation  
CD74HC4060M  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld PDIP  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
CD74HC4060MT  
CD74HC4060M96  
CD74HC4060PW  
CD74HC4060PWR  
CD74HC4060PWT  
CD74HCT4060E  
CD74HCT4060M  
CD74HCT4060MT  
CD74HCT4060M96  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
OL OH  
l
Description  
The ’HC4060 and ’HCT4060 each consist of an oscillator  
section and 14 ripple-carry binary counter stages. The  
oscillator configuration allows design of either RC or crystal  
oscillator circuits. A Master Reset input is provided which  
resets the counter to the all-0’s state and disables the  
oscillator. A high level on the MR line accomplishes the reset  
function. All counter stages are master-slave flip-flops. The  
state of the counter is advanced one step in binary order on  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
Pinout  
CD54HC4060, CD54HCT4060 (CERDIP)  
CD74HC4060 (PDIP, SOIC, TSSOP)  
CD74HCT4060 (PDIP, SOIC)  
TOP VIEW  
Q12  
Q13  
Q14  
Q6  
1
2
3
4
5
6
7
8
16 V  
CC  
15 Q10  
14 Q8  
13 Q9  
12 MR  
11 φI  
Q5  
Q7  
10 φO  
Q4  
9
φO  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
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CD74HC4060PWG4 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC4060E TI

类似代替

 High Speed CMOS Logic 14-Stage Binary Counter with Oscillator
SN74HC4060N TI

类似代替

 14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS
SN74HC4060DBR TI

类似代替

 12-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS

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