CD54ACT02, CD74ACT02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
SCHS309B – JANUARY 2001 – REVISED MAY 2002
CD54ACT02 . . . F PACKAGE
CD74ACT02 . . . E OR M PACKAGE
(TOP VIEW)
Inputs Are TTL-Voltage Compatible
Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
1Y
1A
V
CC
Balanced Propagation Delays
1
2
3
4
5
6
7
14
13
12
11
4Y
4B
4A
±24-mA Output Drive Current
– Fanout to 15 F Devices
1B
2Y
SCR-Latchup-Resistant CMOS Process and
Circuit Design
2A
10 3Y
9
8
2B
3B
3A
Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
GND
description
The ’ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A
or Y = A + B in positive logic.
B
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP – E
Tube
Tube
CD74ACT02E
CD74ACT02E
CD74ACT02M
CD74ACT02M96
CD54ACT02F3A
–55°C to 125°C
SOIC – M
ACT02M
Tape and reel
Tube
CDIP – F
CD54ACT02F3A
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
X
H
L
H
X
L
L
L
H
logic diagram (positive logic)
2
8
1A
3
1
3A
9
10
13
1Y
2Y
3Y
4Y
1B
3B
5
11
4A
2A
6
4
12
2B
4B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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