CD54AC273, CD74AC273
CD54ACT273, CD74ACT273
Data sheet acquired from Harris Semiconductor
SCHS249A
August 1998 - Revised April 2000
Octal D Flip-Flop with Reset
Features
Description
• Buffered Inputs
The ’AC273 and ’ACT273 devices are octal D-type flip-flops
with reset that utilize advanced CMOS logic technology.
Information at the D input is transferred to the Q output on
the positive-going edge of the clock pulse. All eight flip-flops
are controlled by a common clock (CP) and a common reset
• Typical Propagation Delay
o
- 6.5ns at V
= 5V, T = 25 C, C = 50pF
A L
CC
• Exceeds 2kV ESD Protection MIL-STD-883, Method
3015
(MR). Resetting is accomplished by a low voltage level
independent of the clock.
• SCR-Latchup-Resistant CMOS Process and Circuit
Design
Ordering Information
• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption
PART
NUMBER
TEMPERATURE
RANGE
PACKAGE
20 Ld PDIP
20 Ld CDIP
20 Ld PDIP
20 Ld CDIP
20 Ld SOIC
20 Ld SOIC
• Balanced Propagation Delays
o
o
CD74AC273E
CD54AC273F3A
CD74ACT273E
CD54ACT273F3A
CD74AC273M
CD74ACT273M
NOTES:
-40 C to 85 C
• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply
o
o
-55 C to 125 C
o
o
-40 C to 85 C
• ±24mA Output Drive Current
- Fanout to 15 FAST™ ICs
o
o
-55 C to 125 C
o
o
-40 C to 85 C
- Drives 50Ω Transmission Lines
o
o
-40 C to 85 C
Pinout
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
CD54AC273, CD54ACT273
(CDIP)
CD74AC273, CD74ACT273
(PDIP, SOIC)
2. Wafer and die for this part number is available which meets all
electrical specifications. Please contact your local sales office for
ordering information.
TOP VIEW
1
2
3
4
5
6
7
8
9
V
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
20
19
CC
Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12
Q4
GND 10
11 CP
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.
1
Copyright © 2000, Texas Instruments Incorporated