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CD54HCT365

更新时间： 2024-11-23 21:58:27
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德州仪器 - TI 驱动器
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13页 282K
描述
High Speed CMOS Logic Hex Buffer/Line Driver, Three-State Non-Inverting and Inverting

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CD54HCT365 数据手册

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CD54/74HC365, CD54/74HCT365,  
CD54/74HC366  
Data sheet acquired from Harris Semiconductor  
SCHS180C  
High Speed CMOS Logic Hex Buffer/Line Driver,  
Three-State Non-Inverting and Inverting  
November 1997 - Revised October 2003  
low power Schottky TTL circuits. Both circuits are capable of  
driving up to 15 low power Schottky inputs.  
Features  
• Buffered Inputs  
The ’HC365 and ’HCT365 are non-inverting buffers, whereas  
the ’HC366 is an inverting buffer. These devices have two  
three-state control inputs (OE1 and OE2) which are NORed  
• High Current Bus Driver Outputs  
[ /Title  
(CD74  
HC365  
,
CD74  
HCT36  
5,  
CD74  
HC366  
,
CD74  
HCT36  
6)  
• Typical Propagation Delay t  
, t  
= 8ns at V = 5V,  
CC  
PLH PHL  
together to control all six gates.  
o
C = 15pF, T = 25 C  
L
A
The ’HCT365 logic families are speed, function and pin  
compatible with the standard LS logic family.  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Ordering Information  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
TEMP. RANGE  
o
PART NUMBER  
CD54HC365F3A  
CD54HC366F3A  
CD54HCT365F3A  
CD74HC365E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
• HC Types  
- 2V to 6V Operation  
CD74HC365M  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
/Sub-  
ject  
(High  
Speed  
at V  
= 5V  
CD74HC365MT  
CD74HC365M96  
CD74HC366E  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
CD74HC366M  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
CD74HC366M96  
CD74HCT365E  
CD74HCT365M  
CD74HCT365MT  
CD74HCT365M96  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
OL OH  
l
Description  
The ’HC365, ’HCT365, and ’HC366 silicon gate CMOS three-  
state buffers are general purpose high-speed non-inverting  
and inverting buffers. They have high drive current outputs  
which enable high speed operation even when driving large  
bus capacitances. These circuits possess the low power  
dissipation of CMOS circuitry, yet have speeds comparable to  
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and real. The suffix T denotes a small-quantity reel of  
250.  
Pinout  
CD54HC365, CD54HCT365, CD54HC366  
(CERDIP)  
CD74HC365, CD74HCT365, CD74HC366  
(PDIP, SOIC)  
TOP VIEW  
OE1  
1A  
1
2
3
4
5
6
7
8
16 V  
CC  
15 OE2  
14 6A  
(1Y) 1Y  
2A  
13 6Y (6Y)  
12 5A  
(2Y) 2Y  
3A  
11 5Y (5Y)  
10 4A  
(3Y) 3Y  
GND  
9
4Y (4Y)  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
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